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ORCIDIsil Dillig
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- affiliation: The University of Texas, Austin, TX, USA
- affiliation (former): Stanford University, USA
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2020 – today
- 2023
[i43]Jimmy Xin, Linus Zheng, Jiayi Wei, Kia Rahmani, Jarrett Holtz, Isil Dillig, Joydeep Biswas:
PLUNDER: Probabilistic Program Synthesis for Learning from Unlabeled and Noisy Demonstrations. CoRR abs/2303.01440 (2023)- [i42]Jiayi Wei, Greg Durrett, Isil Dillig:
TypeT5: Seq2seq Type Inference using Static Analysis. CoRR abs/2303.09564 (2023) - [i41]Hongbo Wen, Jon Stephens, Yanju Chen, Kostas Ferles, Shankara Pailoor, Kyle Charbonnet, Isil Dillig, Yu Feng:
Practical Security Analysis of Zero-Knowledge Proof Circuits. IACR Cryptol. ePrint Arch. 2023: 190 (2023) - 2022
- [j25]Kostas Ferles
, Benjamin Sepanski, Rahul Krishnan, James Bornholt, Isil Dillig:
Synthesizing fine-grained synchronization protocols for implicit monitors. Proc. ACM Program. Lang. 6(OOPSLA1): 1-26 (2022) - [j24]Benjamin Mariano, Yanju Chen, Yu Feng, Greg Durrett, Isil Dillig:
Automated transpilation of imperative to functional code using neural-guided program synthesis. Proc. ACM Program. Lang. 6(OOPSLA1): 1-27 (2022) - [j23]Qiaochu Chen, Shankara Pailoor, Celeste Barnaby, Abby Criswell, Chenglong Wang, Greg Durrett, Isil Dillig:
Type-directed synthesis of visualizations from natural language queries. Proc. ACM Program. Lang. 6(OOPSLA2): 532-559 (2022) - [j22]Yanju Chen, Yuepeng Wang, Maruth Goyal, James Dong, Yu Feng, Isil Dillig:
Synthesis-powered optimization of smart contracts via data type refactoring. Proc. ACM Program. Lang. 6(OOPSLA2): 560-588 (2022) - [j21]Anders Miltner, Adrian Trejo Nuñez, Ana Brendel, Swarat Chaudhuri, Isil Dillig:
Bottom-up synthesis of recursive functional programs using angelic execution. Proc. ACM Program. Lang. 6(POPL): 1-29 (2022) - [j20]Bryan Tan, Benjamin Mariano, Shuvendu K. Lahiri, Isil Dillig, Yu Feng:
SolType: refinement types for arithmetic overflow in solidity. Proc. ACM Program. Lang. 6(POPL): 1-29 (2022) - [c66]Madelon Hulsebos, Sneha Gathani, James Gale, Isil Dillig, Paul Groth, Çagatay Demiralp:
Making Table Understanding Work in Practice. CIDR 2022 - [c65]Jürgen Cito, Isil Dillig, Vijayaraghavan Murali, Satish Chandra:
Counterfactual Explanations for Models of Code. ICSE (SEIP) 2022: 125-134 - [c64]Jiayi Wei, Jarrett Holtz, Isil Dillig, Joydeep Biswas:
STEADY: Simultaneous State Estimation and Dynamics Learning from Indirect Observations. IROS 2022: 6593-6599 - [c63]Junrui Liu, Yanju Chen, Bryan Tan, Isil Dillig, Yu Feng:
Learning Contract Invariants Using Reinforcement Learning. ASE 2022: 63:1-63:11 - [e5]Ranjit Jhala, Isil Dillig:
PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13 - 17, 2022. ACM 2022, ISBN 978-1-4503-9265-5 [contents] - [i40]Kostas Ferles, Benjamin Sepanski, Rahul Krishnan, James Bornholt, Isil Dillig:
Synthesizing Fine-Grained Synchronization Protocols for Implicit Monitors (Extended Version). CoRR abs/2203.00783 (2022) - [i39]Jiayi Wei, Jarrett Holtz, Isil Dillig, Joydeep Biswas:
STEADY: Simultaneous State Estimation and Dynamics Learning from Indirect Observations. CoRR abs/2203.01299 (2022) - [i38]Benjamin Mariano, Yanju Chen, Yu Feng, Greg Durrett, Isil Dillig:
Automated Transpilation of Imperative to Functional Code using Neural-Guided Program Synthesis (Extended Version). CoRR abs/2203.09452 (2022) - [i37]Hayley LeBlanc, Shankara Pailoor, Isil Dillig, James Bornholt, Vijay Chidambaram:
Finding and Analyzing Crash-Consistency Bugs in Persistent-Memory File Systems. CoRR abs/2204.06066 (2022) - [i36]John K. Feser, Isil Dillig, Armando Solar-Lezama:
Metric Program Synthesis for Inverse CSG. CoRR abs/2206.06164 (2022) - [i35]Qiaochu Chen, Shankara Pailoor, Celeste Barnaby, Abby Criswell, Chenglong Wang, Greg Durrett, Isil Dillig:
Type-Directed Synthesis of Visualizations from Natural Language Queries. CoRR abs/2209.01081 (2022) - [i34]Greg Anderson, Swarat Chaudhuri, Isil Dillig:
Guiding Safe Exploration with Weakest Preconditions. CoRR abs/2209.14148 (2022) - 2021
- [j19]Guoqiang Zhang, Yuanchao Xu, Xipeng Shen, Isil Dillig:
UDF to SQL translation through compositional lazy inductive synthesis. Proc. ACM Program. Lang. 5(OOPSLA): 1-26 (2021) - [j18]Kostas Ferles, Jon Stephens, Isil Dillig:
Verifying correct usage of context-free API protocols. Proc. ACM Program. Lang. 5(POPL): 1-30 (2021) - [c62]Chenglong Wang, Yu Feng, Rastislav Bodík, Isil Dillig, Alvin Cheung, Amy J. Ko:
Falx: Synthesis-Powered Visualization Authoring. CHI 2021: 106:1-106:15 - [c61]Xi Ye, Qiaochu Chen, Isil Dillig, Greg Durrett:
Optimal Neural Program Synthesis from Multimodal Specifications. EMNLP (Findings) 2021: 1691-1704 - [c60]Jiayi Wei, Tongrui Li, Swarat Chaudhuri, Isil Dillig, Joydeep Biswas:
OneVision: Centralized to Distributed Controller Synthesis with Delay Compensation. IROS 2021: 398-405 - [c59]Qiaochu Chen, Aaron Lamoreaux, Xinyu Wang, Greg Durrett, Osbert Bastani, Isil Dillig:
Web question answering with neurosymbolic program synthesis. PLDI 2021: 328-343 - [c58]Shankara Pailoor, Yuepeng Wang, Xinyu Wang, Isil Dillig:
Synthesizing data structure refinements from integrity constraints. PLDI 2021: 574-587 - [c57]Zhen Zhang, Yu Feng, Michael D. Ernst, Sebastian Porst, Isil Dillig:
Checking conformance of applications against GUI policies. ESEC/SIGSOFT FSE 2021: 95-106 - [c56]Jürgen Cito, Isil Dillig, Seohyun Kim, Vijayaraghavan Murali, Satish Chandra:
Explaining mispredictions of machine learning models using rule induction. ESEC/SIGSOFT FSE 2021: 716-727 - [c55]Jon Stephens, Kostas Ferles, Benjamin Mariano, Shuvendu K. Lahiri, Isil Dillig:
SmartPulse: Automated Checking of Temporal Properties in Smart Contracts. IEEE Symposium on Security and Privacy 2021: 555-571 - [e4]Roopsha Samanta, Isil Dillig:
MAPS@PLDI 2021: Proceedings of the 5th ACM SIGPLAN International Symposium on Machine Programming, Virtual Event, Canada, 21 June, 2021. ACM 2021, ISBN 978-1-4503-8467-4 [contents] - [i33]Chenglong Wang, Yu Feng, Rastislav Bodík, Isil Dillig, Alvin Cheung, Amy J. Ko:
Falx: Synthesis-Powered Visualization Authoring. CoRR abs/2102.01024 (2021) - [i32]Jiayi Wei, Tongrui Li, Swarat Chaudhuri, Isil Dillig, Joydeep Biswas:
OneVision: Centralized to Distributed Controller Synthesis with Delay Compensation. CoRR abs/2104.06588 (2021) - [i31]Qiaochu Chen, Aaron Lamoreaux, Xinyu Wang, Greg Durrett, Osbert Bastani, Isil Dillig:
Web Question Answering with Neurosymbolic Program Synthesis. CoRR abs/2104.07162 (2021) - [i30]Anders Miltner, Adrian Trejo Nuñez, Ana Brendel, Swarat Chaudhuri, Isil Dillig:
Bottom-up Synthesis of Recursive Functional Programs using Angelic Execution. CoRR abs/2107.06253 (2021) - [i29]Madelon Hulsebos, Sneha Gathani, James Gale, Isil Dillig, Paul Groth, Çagatay Demiralp:
Making Table Understanding Work in Practice. CoRR abs/2109.05173 (2021) - [i28]Bryan Tan, Benjamin Mariano, Shuvendu K. Lahiri, Isil Dillig, Yu Feng:
SolType: Refinement Types for Solidity. CoRR abs/2110.00677 (2021) - [i27]Jürgen Cito, Isil Dillig, Vijayaraghavan Murali, Satish Chandra:
Counterfactual Explanations for Models of Code. CoRR abs/2111.05711 (2021) - 2020
- [j17]Shankara Pailoor, Xinyu Wang, Hovav Shacham, Isil Dillig:
Automated policy synthesis for system call sandboxing. Proc. ACM Program. Lang. 4(OOPSLA): 135:1-135:26 (2020) - [j16]Chenglong Wang, Yu Feng, Rastislav Bodík, Alvin Cheung, Isil Dillig:
Visualization by example. Proc. ACM Program. Lang. 4(POPL): 49:1-49:28 (2020) - [j15]Yuepeng Wang, Rushi Shah, Abby Criswell, Rong Pan, Isil Dillig:
Data Migration using Datalog Program Synthesis. Proc. VLDB Endow. 13(7): 1006-1019 (2020) - [j14]Kostas Ferles, Jacob Van Geffen, Isil Dillig, Yannis Smaragdakis:
Symbolic Reasoning for Automatic Signal Placement. ACM SIGOPS Oper. Syst. Rev. 54(1): 64-76 (2020) - [j13]Xi Ye, Qiaochu Chen, Xinyu Wang, Isil Dillig, Greg Durrett:
Sketch-Driven Regular Expression Generation from Natural Language and Examples. Trans. Assoc. Comput. Linguistics 8: 679-694 (2020) - [c54]Xi Ye, Qiaochu Chen, Isil Dillig, Greg Durrett:
Benchmarking Multimodal Regex Synthesis with Complex Structures. ACL 2020: 6081-6094 - [c53]Jacob Van Geffen, Luke Nelson, Isil Dillig, Xi Wang, Emina Torlak:
Synthesizing JIT Compilers for In-Kernel DSLs. CAV (2) 2020: 564-586 - [c52]Yanju Chen, Chenglong Wang, Osbert Bastani, Isil Dillig, Yu Feng:
Program Synthesis Using Deduction-Guided Reinforcement Learning. CAV (2) 2020: 587-610 - [c51]Jiayi Wei, Maruth Goyal, Greg Durrett, Isil Dillig:
LambdaNet: Probabilistic Type Inference using Graph Neural Networks. ICLR 2020 - [c50]Benjamin Mariano, Yanju Chen, Yu Feng, Shuvendu K. Lahiri, Isil Dillig:
Demystifying Loops in Smart Contracts. ASE 2020: 262-274 - [c49]Greg Anderson, Abhinav Verma, Isil Dillig, Swarat Chaudhuri:
Neurosymbolic Reinforcement Learning with Formally Verified Exploration. NeurIPS 2020 - [c48]Qiaochu Chen, Xinyu Wang, Xi Ye, Greg Durrett, Isil Dillig:
Multi-modal synthesis of regular expressions. PLDI 2020: 487-502 - [i26]Yuepeng Wang, Rushi Shah, Abby Criswell, Rong Pan, Isil Dillig:
Data Migration using Datalog Program Synthesis. CoRR abs/2003.01331 (2020) - [i25]Xi Ye, Qiaochu Chen, Isil Dillig, Greg Durrett:
Benchmarking Multimodal Regex Synthesis with Complex Structures. CoRR abs/2005.00663 (2020) - [i24]Jiayi Wei, Maruth Goyal, Greg Durrett, Isil Dillig:
LambdaNet: Probabilistic Type Inference using Graph Neural Networks. CoRR abs/2005.02161 (2020) - [i23]Greg Anderson, Abhinav Verma, Isil Dillig, Swarat Chaudhuri:
Neurosymbolic Reinforcement Learning with Formally Verified Exploration. CoRR abs/2009.12612 (2020) - [i22]Xi Ye, Qiaochu Chen, Isil Dillig, Greg Durrett:
Optimal Neural Program Synthesis from Multimodal Specifications. CoRR abs/2010.01678 (2020) - [i21]Kostas Ferles, Jon Stephens, Isil Dillig:
Verifying Correct Usage of Context-Free API Protocols (Extended Version). CoRR abs/2010.09652 (2020)
2010 – 2019
- 2019
- [j12]Jia Chen, Jiayi Wei, Yu Feng, Osbert Bastani, Isil Dillig:
Relational verification using reinforcement learning. Proc. ACM Program. Lang. 3(OOPSLA): 141:1-141:30 (2019) - [j11]Ruben Martins, Jia Chen, Yanju Chen, Yu Feng, Isil Dillig:
Trinity: An Extensible Synthesis Framework for Data Science. Proc. VLDB Endow. 12(12): 1914-1917 (2019) - [c47]Isil Dillig:
Programming support for database schema refactoring (keynote). DBPL 2019: 2 - [c46]Isil Dillig:
Programming support for evolving database applications (invited talk). SPLASH (Companion Volume) 2019: 3 - [c45]Yuepeng Wang, James Dong, Rushi Shah, Isil Dillig:
Synthesizing database programs for schema refactoring. PLDI 2019: 286-300 - [c44]Greg Anderson, Shankara Pailoor, Isil Dillig, Swarat Chaudhuri:
Optimization and abstraction: a synergistic approach for analyzing neural network robustness. PLDI 2019: 731-744 - [c43]Yuepeng Wang, Shuvendu K. Lahiri, Shuo Chen, Rong Pan, Isil Dillig, Cody Born, Immad Naseer, Kostas Ferles:
Formal Verification of Workflow Policies for Smart Contracts in Azure Blockchain. VSTTE 2019: 87-106 - [e3]Isil Dillig, Serdar Tasiran:
Computer Aided Verification - 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019, Proceedings, Part I. Lecture Notes in Computer Science 11561, Springer 2019, ISBN 978-3-030-25539-8 [contents] - [e2]Isil Dillig, Serdar Tasiran:
Computer Aided Verification - 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019, Proceedings, Part II. Lecture Notes in Computer Science 11562, Springer 2019, ISBN 978-3-030-25542-8 [contents] - [i20]Yuepeng Wang, James Dong, Rushi Shah, Isil Dillig:
Synthesizing Database Programs for Schema Refactoring. CoRR abs/1904.05498 (2019) - [i19]Greg Anderson, Shankara Pailoor, Isil Dillig, Swarat Chaudhuri:
Optimization and Abstraction: A Synergistic Approach for Analyzing Neural Network Robustness. CoRR abs/1904.09959 (2019) - [i18]Qiaochu Chen, Xinyu Wang, Xi Ye, Greg Durrett, Isil Dillig:
Multi-Modal Synthesis of Regular Expressions. CoRR abs/1908.03316 (2019) - [i17]Xi Ye, Qiaochu Chen, Xinyu Wang, Isil Dillig, Greg Durrett:
Sketch-Driven Regular Expression Generation from Natural Language and Examples. CoRR abs/1908.05848 (2019) - [i16]Chenglong Wang, Yu Feng, Rastislav Bodík, Alvin Cheung, Isil Dillig:
Visualization by Example. CoRR abs/1911.09668 (2019) - 2018
- [j10]Yuepeng Wang, Xinyu Wang, Isil Dillig:
Relational program synthesis. Proc. ACM Program. Lang. 2(OOPSLA): 155:1-155:27 (2018) - [j9]Marcelo Sousa, Isil Dillig, Shuvendu K. Lahiri:
Verified three-way program merge. Proc. ACM Program. Lang. 2(OOPSLA): 165:1-165:29 (2018) - [j8]Yuepeng Wang, Isil Dillig, Shuvendu K. Lahiri, William R. Cook:
Verifying equivalence of database-driven applications. Proc. ACM Program. Lang. 2(POPL): 56:1-56:29 (2018) - [j7]Xinyu Wang, Isil Dillig, Rishabh Singh:
Program synthesis using abstraction refinement. Proc. ACM Program. Lang. 2(POPL): 63:1-63:30 (2018) - [j6]Navid Yaghmazadeh, Xinyu Wang, Isil Dillig:
Automated Migration of Hierarchical Data to Relational Tables using Programming-by-Example. Proc. VLDB Endow. 11(5): 580-593 (2018) - [c42]Xinyu Wang, Greg Anderson, Isil Dillig, Kenneth L. McMillan:
Learning Abstractions for Program Synthesis. CAV (1) 2018: 407-426 - [c41]Kostas Ferles, Jacob Van Geffen, Isil Dillig, Yannis Smaragdakis:
Symbolic reasoning for automatic signal placement. PLDI 2018: 120-134 - [c40]Yu Feng, Ruben Martins, Osbert Bastani, Isil Dillig:
Program synthesis using conflict-driven learning. PLDI 2018: 420-435 - [c39]Jiayi Wei, Jia Chen, Yu Feng, Kostas Ferles, Isil Dillig:
Singularity: pattern fuzzing for worst case complexity. ESEC/SIGSOFT FSE 2018: 213-223 - [e1]Isil Dillig, Jens Palsberg:
Verification, Model Checking, and Abstract Interpretation - 19th International Conference, VMCAI 2018, Los Angeles, CA, USA, January 7-9, 2018, Proceedings. Lecture Notes in Computer Science 10747, Springer 2018, ISBN 978-3-319-73720-1 [contents] - [i15]Marcelo Sousa, Isil Dillig, Shuvendu K. Lahiri:
Verifying Semantic Conflict-Freedom in Three-Way Program Merges. CoRR abs/1802.06551 (2018) - [i14]Kostas Ferles, Jacob Van Geffen, Isil Dillig, Yannis Smaragdakis:
Symbolic Reasoning for Automatic Signal Placement (Extended Version). CoRR abs/1804.02503 (2018) - [i13]Xinyu Wang, Greg Anderson, Isil Dillig, Kenneth L. McMillan:
Learning Abstractions for Program Synthesis. CoRR abs/1804.04152 (2018) - [i12]Yuepeng Wang, Xinyu Wang, Isil Dillig:
Relational Program Synthesis. CoRR abs/1809.02283 (2018) - [i11]Shuvendu K. Lahiri, Shuo Chen, Yuepeng Wang, Isil Dillig:
Formal Specification and Verification of Smart Contracts for Azure Blockchain. CoRR abs/1812.08829 (2018) - 2017
- [j5]Xinyu Wang, Isil Dillig, Rishabh Singh:
Synthesis of data completion scripts using finite tree automata. Proc. ACM Program. Lang. 1(OOPSLA): 62:1-62:26 (2017) - [j4]Navid Yaghmazadeh, Yuepeng Wang, Isil Dillig, Thomas Dillig:
SQLizer: query synthesis from natural language. Proc. ACM Program. Lang. 1(OOPSLA): 63:1-63:26 (2017) - [j3]Isil Dillig, Thomas Dillig, Boyang Li, Kenneth L. McMillan, Mooly Sagiv:
Synthesis of circular compositional program proofs via abduction. Int. J. Softw. Tools Technol. Transf. 19(5): 535-547 (2017) - [c38]Jia Chen, Yu Feng, Isil Dillig:
Precise Detection of Side-Channel Vulnerabilities using Quantitative Cartesian Hoare Logic. CCS 2017: 875-890 - [c37]Jia Chen, Oswaldo Olivo, Isil Dillig, Calvin Lin:
Static detection of asymptotic resource side-channel vulnerabilities in web applications. ASE 2017: 229-239 - [c36]Yu Feng, Osbert Bastani, Ruben Martins, Isil Dillig, Saswat Anand:
Automated Synthesis of Semantic Malware Signatures using Maximum Satisfiability. NDSS 2017 - [c35]Yu Feng, Ruben Martins, Jacob Van Geffen, Isil Dillig, Swarat Chaudhuri:
Component-based synthesis of table consolidation and transformation tasks from examples. PLDI 2017: 422-436 - [c34]Yu Feng, Ruben Martins, Yuepeng Wang, Isil Dillig, Thomas W. Reps:
Component-based synthesis for complex APIs. POPL 2017: 599-612 - [c33]Kostas Ferles, Valentin Wüstholz, Maria Christakis, Isil Dillig:
Failure-directed program trimming. ESEC/SIGSOFT FSE 2017: 174-185 - [c32]Valentin Wüstholz, Oswaldo Olivo, Marijn J. H. Heule, Isil Dillig:
Static Detection of DoS Vulnerabilities in Programs that Use Regular Expressions. TACAS (2) 2017: 3-20 - [i10]Valentin Wüstholz, Oswaldo Olivo, Marijn J. H. Heule, Isil Dillig:
Static Detection of DoS Vulnerabilities in Programs that use Regular Expressions (Extended Version). CoRR abs/1701.04045 (2017) - [i9]Navid Yaghmazadeh, Yuepeng Wang, Isil Dillig, Thomas Dillig:
Type- and Content-Driven Synthesis of SQL Queries from Natural Language. CoRR abs/1702.01168 (2017) - [i8]Kostas Ferles, Valentin Wüstholz, Maria Christakis, Isil Dillig:
Failure-Directed Program Trimming (Extended Version). CoRR abs/1706.04468 (2017) - [i7]Xinyu Wang, Isil Dillig, Rishabh Singh:
Synthesis of Data Completion Scripts using Finite Tree Automata. CoRR abs/1707.01469 (2017) - [i6]Yuepeng Wang, Isil Dillig, Shuvendu K. Lahiri, William R. Cook:
Verifying Equivalence of Database-Driven Applications. CoRR abs/1710.07660 (2017) - [i5]Xinyu Wang, Isil Dillig, Rishabh Singh:
Program Synthesis using Abstraction Refinement. CoRR abs/1710.07740 (2017) - [i4]Navid Yaghmazadeh, Xinyu Wang, Isil Dillig:
Automated Migration of Hierarchical Data to Relational Tables using Programming-by-Example. CoRR abs/1711.04001 (2017) - 2016
- [c31]Marcelo Sousa, Isil Dillig:
Cartesian hoare logic for verifying k-safety properties. PLDI 2016: 57-69 - [c30]Navid Yaghmazadeh, Christian Klinger, Isil Dillig, Swarat Chaudhuri:
Synthesizing transformations on hierarchically structured data. PLDI 2016: 508-521 - [c29]Aws Albarghouthi, Isil Dillig, Arie Gurfinkel:
Maximal specification synthesis. POPL 2016: 789-801 - [c28]Yuepeng Wang, Yu Feng, Ruben Martins, Arati Kaushik, Isil Dillig, Steven P. Reiss:
Hunter: next-generation code reuse for Java. SIGSOFT FSE 2016: 1028-1032 - [i3]Yu Feng, Osbert Bastani, Ruben Martins, Isil Dillig, Saswat Anand:
Automated Synthesis of Semantic Malware Signatures using Maximum Satisfiability. CoRR abs/1608.06254 (2016) - [i2]Yuepeng Wang, Yu Feng, Ruben Martins, Arati Kaushik, Isil Dillig, Steven P. Reiss:
Type-Directed Code Reuse using Integer Linear Programming. CoRR abs/1608.07745 (2016) - [i1]Yu Feng, Ruben Martins, Jacob Van Geffen, Isil Dillig, Swarat Chaudhuri:
Component-based Synthesis of Table Consolidation and Transformation Tasks from Examples. CoRR abs/1611.07502 (2016) - 2015
- [c27]Yu Feng, Xinyu Wang, Isil Dillig, Thomas Dillig:
Bottom-Up Context-Sensitive Pointer Analysis for Java. APLAS 2015: 465-484 - [c26]Oswaldo Olivo, Isil Dillig, Calvin Lin:
Detecting and Exploiting Second Order Denial-of-Service Vulnerabilities in Web Applications. CCS 2015: 616-628 - [c25]Isil Dillig:
Abductive Inference and Its Applications in Program Analysis, Verification, and Synthesis. FMCAD 2015: 4 - [c24]Yu Feng, Xinyu Wang, Isil Dillig, Calvin Lin:
EXPLORER : query- and demand-driven exploration of interprocedural control flow properties. OOPSLA 2015: 520-534 - [c23]John K. Feser, Swarat Chaudhuri, Isil Dillig:
Synthesizing data structure transformations from input-output examples. PLDI 2015: 229-239 - [c22]Oswaldo Olivo, Isil Dillig, Calvin Lin:
Static detection of asymptotic performance bugs in collection traversals. PLDI 2015: 369-378 - 2014
- [c21]Thomas Dillig, Isil Dillig, Swarat Chaudhuri:
Optimal Guard Synthesis for Memory Safety. CAV 2014: 491-507 - [c20]Marcelo Sousa, Isil Dillig, Dimitrios Vytiniotis, Thomas Dillig, Christos Gkantsidis:
Consolidation of queries with user-defined functions. PLDI 2014: 554-564 - [c19]Yu Feng, Isil Dillig, Saswat Anand, Alex Aiken:
Apposcopy: automated detection of Android malware (invited talk). DeMobile@SIGSOFT FSE 2014: 13-14 - [c18]