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ORCIDJames R. Goodman
Person information
- affiliation: University of Auckland
- affiliation: University of Wisconsin-Madison
- award (2013): Eckert-Mauchly Award
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2010 – 2019
- 2014
[c32]James R. Goodman, Wei-Chung Hsu
:
Author retrospective for code scheduling and register allocation in large basic blocks. ICS 25th Anniversary 2014: 4-5- 2011
- [c31]Fuad Tabba, Andrew W. Hay, James R. Goodman:
Transactional conflict decoupling and value prediction. ICS 2011: 33-42
2000 – 2009
- 2009
- [c30]Fuad Tabba, Mark Moir, James R. Goodman, Andrew W. Hay, Cong Wang:
NZTM: nonblocking zero-indirection transactional memory. SPAA 2009: 204-213 - 2004
- [b2]Andrew S. Tanenbaum, James R. Goodman:
Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage. Pearson Studium 2004, ISBN 978-3-8273-7148-5, pp. 1-772 - [j15]Doug Burger, James R. Goodman:
Billion-Transistor Architectures: There and Back Again. Computer 37(3): 22-28 (2004) - [j14]Ravi Rajwar, Alain Kägi, James R. Goodman:
Inferential Queueing and Speculative Push. Int. J. Parallel Program. 32(3): 225-258 (2004) - [e2]Paul Feautrier, James R. Goodman, André Seznec:
Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004. ACM 2004, ISBN 1-58113-839-3 [contents] - 2003
- [j13]Ravi Rajwar, James R. Goodman:
Transactional Execution: Toward Reliable, High-Performance Multithreading. IEEE Micro 23(6): 117-125 (2003) - [c29]Ravi Rajwar, Alain Kägi, James R. Goodman:
Inferential queueing and speculative push for reducing critical communication latencies. ICS 2003: 273-284 - 2002
- [c28]Ravi Rajwar, James R. Goodman:
Transactional lock-free execution of lock-based programs. ASPLOS 2002: 5-17 - 2001
- [b1]Andrew S. Tanenbaum, James R. Goodman:
Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage. Pearson Studium 2001, ISBN 978-3-8273-7016-7, pp. 1-772 - [c27]Ravi Rajwar, James R. Goodman:
Speculative lock elision: enabling highly concurrent multithreaded execution. MICRO 2001: 294-305 - 2000
- [c26]Ravi Rajwar, Alain Kägi, James R. Goodman:
Improving the Throughput of Synchronization by Insertion of Delays. HPCA 2000: 168-179
1990 – 1999
- 1999
- [j12]Stefanos Kaxiras, Doug Burger, James R. Goodman:
DataScalar: A memory-centric approach to computing. J. Syst. Archit. 45(12-13): 1001-1022 (1999) - [c25]Stefanos Kaxiras, James R. Goodman:
Improving CC-NUMA Performance Using Instruction-Based Prediction. HPCA 1999: 161-170 - 1998
- [c24]Stefanos Kaxiras, Stein Gjessing, James R. Goodman:
A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors. International Conference on Supercomputing 1998: 457-464 - [c23]James R. Goodman:
Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic. 25 Years ISCA: Retrospectives and Reprints 1998: 32-33 - [c22]James R. Goodman:
Using Cache Memory to Reduce Processor-Memory Traffic. 25 Years ISCA: Retrospectives and Reprints 1998: 255-262 - 1997
- [j11]Doug Burger, James R. Goodman:
Billion-Transistor Architectures - Guest Editors' Introduction. Computer 30(9): 46-49 (1997) - [j10]Doug Burger, James R. Goodman, Alain Kägi:
Limited bandwidth to affect processor design. IEEE Micro 17(6): 55-62 (1997) - [c21]Alain Kägi, Doug Burger, James R. Goodman:
Efficient Synchronization: Let Them Eat QOLB. ISCA 1997: 170-180 - [c20]Doug Burger, Stefanos Kaxiras, James R. Goodman:
DataScalar Architectures. ISCA 1997: 338-349 - [r1]Doug Burger, James R. Goodman, Gurindar S. Sohi:
Memory Systems. The Computer Science and Engineering Handbook 1997: 447-461 - 1996
- [c19]Stefanos Kaxiras, James R. Goodman:
The GLOW Cache Coherence Protocol Extensions for Widely Shared Data. International Conference on Supercomputing 1996: 35-43 - [c18]Doug Burger, James R. Goodman, Alain Kägi:
Memory Bandwidth Limitations of Future Microprocessors. ISCA 1996: 78-89 - 1995
- [c17]Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman:
Techniques for Reducing Overheads of Shared-Memory Multiprocessing. International Conference on Supercomputing 1995: 11-20 - 1994
- [j9]Steven L. Scott, James R. Goodman:
The Impact of Pipelined Channels on k-ary n-Cube Networks. IEEE Trans. Parallel Distributed Syst. 5(1): 2-16 (1994) - [c16]Nagi Aboulenein, James R. Goodman, Stein Gjessing, Philip J. Woest:
Hardware Support for Synchronization in the Scalable Coherent Interface (SCI). IPPS 1994: 141-150 - 1993
- [j8]Steven L. Scott, James R. Goodman:
Performance of Pruning-Cache Directories for Large-Scale Multiprocessors. IEEE Trans. Parallel Distributed Syst. 4(5): 520-534 (1993) - 1992
- [j7]Howard Jay Siegel, Seth Abraham, William L. Bain, Kenneth E. Batcher, Thomas L. Casavant, Doug DeGroot, Jack B. Dennis, David C. Douglas, Tse-Yun Feng, James R. Goodman, Alan Huang, Harry F. Jordan, J. Robert Jamp, Yale N. Patt, Alan Jay Smith, James E. Smith, Lawrence Snyder, Harold S. Stone, Russ Tuck, Benjamin W. Wah:
Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing. J. Parallel Distributed Comput. 16(3): 199-211 (1992) - [c15]Ross E. Johnson, James R. Goodman:
Synthesizing General Topologies from Rings. ICPP (1) 1992: 86-95 - [c14]Steven L. Scott, James R. Goodman, Mary K. Vernon:
Performance of the SCI Ring. ISCA 1992: 403-414 - 1990
- [e1]Jean-Loup Baer, Larry Snyder, James R. Goodman:
Proceedings of the 17th Annual International Symposium on Computer Architecture, Seattle, WA, USA, June 1990. ACM 1990, ISBN 0-89791-366-3 [contents]
1980 – 1989
- 1989
- [j6]Wei-Chung Hsu, Charles N. Fischer, James R. Goodman:
On the Minimization of Loads/Stores in Local Register Allocation. IEEE Trans. Software Eng. 15(10): 1252-1260 (1989) - [c13]James R. Goodman, Mary K. Vernon, Philip J. Woest:
Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. ASPLOS 1989: 64-75 - [c12]Gurindar S. Sohi, James E. Smith, James R. Goodman:
Restricted Fetch&Phi operations for parallel processing. ICS 1989: 410-416 - 1988
- [j5]James R. Goodman:
Reply to David R. Cheriton's, Pat Boyle's, and Gert A. Slavenburg's "Comments on 'Coherency for multiprocessor virtual addressed caches' by James R. Goodman". SIGARCH Comput. Archit. News 16(3): 7 (1988) - [c11]James R. Goodman, Wei-Chung Hsu:
Code scheduling and register allocation in large basic blocks. ICS 1988: 442-452 - [c10]James R. Goodman, Philip J. Woest:
The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor. ISCA 1988: 422-431 - 1987
- [c9]James R. Goodman:
Coherency for Multiprocessor Virtual Address Caches. ASPLOS 1987: 72-81 - [c8]Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter:
WISQ: A Restartable Architecture Using Queues. ISCA 1987: 290-299 - 1986
- [j4]James R. Goodman, Honesty C. Young:
Comments on "A Massive Memory Machine". IEEE Trans. Computers 35(10): 907-910 (1986) - [c7]Honesty C. Young, James R. Goodman:
The Design of a Queue-Based Vector Supercomputer. ICPP 1986: 483-486 - [c6]James R. Goodman, Wei-Chung Hsu:
On the Use of Registers vs. Cache to Minimize Memory Traffic. ISCA 1986: 375-383 - 1985
- [j3]James E. Smith, James R. Goodman:
Instruction Cache Replacement Policies and Organizations. IEEE Trans. Computers 34(3): 234-241 (1985) - [c5]James R. Goodman, Jian-tu Hsieh, Koujuch Liou, Andrew R. Pleszkun, P. B. Schechter, Honesty C. Young:
PIPE: A VLSI Decoupled Architecture. ISCA 1985: 20-27 - 1984
- [c4]James R. Goodman, MenChow Chiang:
The Use of Static Column RAM as a Memory Hierarchy. ISCA 1984: 167-174 - 1983
- [c3]James R. Goodman:
Using Cache Memory to Reduce Processor-Memory Traffic. ISCA 1983: 124-131 - [c2]James E. Smith, James R. Goodman:
A Study of Instruction Cache Organizations and Replacement Policies. ISCA 1983: 132-137 - 1982
- [c1]Chinya V. Ravishankar, James R. Goodman:
VLSI Considerations that Influence Data Flow Architecture. COMPCON 1982: 228-232 - 1981
- [j2]James R. Goodman, Carlo H. Séquin:
Hypertree: A Multiprocessor Interconnection Topology. IEEE Trans. Computers 30(12): 923-933 (1981)
1970 – 1979
- 1972
- [j1]Chittoor V. Ramamoorthy, James R. Goodman, K. H. Kim:
Some Properties of Iterative Square-Rooting Methods Using High-Speed Multiplication. IEEE Trans. Computers 21(8): 837-847 (1972)
Coauthor Index
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