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ORCIDPhilip H. Sweany
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- affiliation: University of North Texas, Denton, USA
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2010 – 2019
- 2014
[c20]Jian Zhang, Philip H. Sweany:
Debugging teacher certification (abstract only). SIGCSE 2014: 730
2000 – 2009
- 2008
- [j9]Hao Li, Jian Huang, Philip H. Sweany, Dijiang Huang
:
FPGA implementations of elliptic curve cryptography and Tate pairing over a binary field. J. Syst. Archit. 54(12): 1077-1088 (2008) - 2007
- [j8]Wentong Li, Mehran Rezaei, Krishna M. Kavi, Afrin Naz, Philip H. Sweany:
Feasibility of decoupling memory management from the execution pipeline. J. Syst. Archit. 53(12): 927-936 (2007) - [c19]Jian Huang, Hao Li, Philip H. Sweany:
An FPGA implementation of elliptic curve cryptography for future secure web transaction. PDCS 2007: 296-301 - 2006
- [j7]Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. Sweany:
Tiny split data-caches make big performance impact for embedded applications. J. Embed. Comput. 2(2): 207-219 (2006) - [c18]Wentong Li, Krishna M. Kavi, Afrin Naz, Philip H. Sweany:
Speculative Thread Execution in a Multithreaded Dataflow Architecture. PDCS 2006: 102-107 - [c17]Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Wentong Li:
A Study of Reconfigurable Split Data Caches and Instruction Caches. PDCS 2006: 235-240 - 2005
- [j6]Afrin Naz, Mehran Rezaei, Krishna M. Kavi, Philip H. Sweany:
Improving data cache performance with integrated use of split caches, victim cache and stream buffers. SIGARCH Comput. Archit. News 33(3): 41-48 (2005) - 2004
- [c16]Steve Carr, Philip H. Sweany:
Automatic data partitioning for the agere payload plus network processor. CASES 2004: 238-247 - [c15]Afrin Naz, Krishna M. Kavi, Philip H. Sweany, Mehran Rezaei:
A Study of Separate Array and Scalar Caches. HPCS 2004: 157-164 - [c14]Afrin Naz, Mehran Rezaei, Krishna Kavi, Philip H. Sweany:
Improving data cache performance with integrated use of split caches, victim cache and stream buffers. MEDEA@PACT 2004: 41-48 - 2003
- [j5]Steve Carr, Philip H. Sweany:
An experimental evaluation of scalar replacement on scientific benchmarks. Softw. Pract. Exp. 33(15): 1419-1445 (2003) - 2002
- [c13]Yi Qian, Steve Carr, Philip H. Sweany:
Optimizing Loop Performance for Clustered VLIW Architectures. IEEE PACT 2002: 271-280 - [c12]Yi Qian, Steve Carr, Philip H. Sweany:
Loop fusion for clustered VLIW architectures. LCTES-SCOPES 2002: 112-119 - 2001
- [c11]Xianglong Huang, Steve Carr, Philip H. Sweany:
Loop Transformations for Architectures with Partitioned Register Banks. LCTES/OM 2001: 48-55 - [c10]Xianglong Huang, Steve Carr, Philip H. Sweany:
Loop Transformations for Architectures with Partitioned Register Banks. OM@PLDI 2001: 48-55 - 2000
- [c9]Jason Hiser, Steve Carr, Philip H. Sweany:
Global Register Partitioning. IEEE PACT 2000: 13-23 - [c8]Jason Hiser, Steve Carr, Philip H. Sweany, Steven J. Beaty:
Register Assignment for Software Pipelining with Partitioned Register Banks. IPDPS 2000: 211-218
1990 – 1999
- 1999
- [j4]Steve Carr, Philip H. Sweany:
Improving software pipelining with hardware support for self-spatial loads. SIGARCH Comput. Archit. News 27(1): 55-58 (1999) - 1998
- [j3]Philip H. Sweany, Steve Carr, Brett L. Huber:
Compiler Optimization for Superscalar Systems: Global Instruction Scheduling without Copies. Digit. Tech. J. 10(1) (1998) - [j2]Vicki H. Allan, Steven J. Beaty, Bogong Su, Philip H. Sweany:
Building a Retargetable Local Instruction Scheduler. Softw. Pract. Exp. 28(3): 249-283 (1998) - 1997
- [c7]Chen Ding, Steve Carr, Philip H. Sweany:
Modulo Scheduling with Cache Reuse Information. Euro-Par 1997: 1079-1083 - 1996
- [c6]Steve Carr, Chen Ding, Philip H. Sweany:
Improving Software Pipelining with Unroll-and-Jam. HICSS (1) 1996: 183-192 - [c5]Michael J. Bourke III, Philip H. Sweany, Steven J. Beaty:
Extending List Scheduling to Consider Execution Frequency. HICSS (1) 1996: 193-202 - 1995
- [c4]Thomas S. Brasier, Philip H. Sweany, Steven J. Beaty, Steve Carr:
CRAIG: a practical framework for combining instruction scheduling and register assignment. PACT 1995: 11-18 - 1992
- [c3]Philip H. Sweany, Steven J. Beaty:
Dominator-path scheduling: a global scheduling method. MICRO 1992: 260-263 - 1990
- [c2]Philip H. Sweany, Steven J. Beaty:
Post-compaction register assignment in a retargetable compiler. MICRO 1990: 107-116
1980 – 1989
- 1988
- [j1]Robert A. Mueller, Michael R. Duda, Philip H. Sweany, Jack S. Walicki:
Horizon: A Retargetable Compiler for Horizontal Microarchitectures. IEEE Trans. Software Eng. 14(5): 575-583 (1988) - 1987
- [c1]Michael A. Howland, Robert A. Mueller, Philip H. Sweany:
Trace scheduling optimization in a retargetable microcode compiler. MICRO 1987: 106-114
Coauthor Index
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