"Layer minimization in escape routing for staggered-pin-array PCBs."

Yuan-Kai Ho et al. (2013)

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DOI: 10.1109/ASPDAC.2013.6509594

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-01

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Yuan-Kai Ho, Xin-Wei Shih, Yao-Wen Chang, Chung-Kuan Cheng:
Layer minimization in escape routing for staggered-pin-array PCBs. ASP-DAC 2013: 187-192

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