"A high-speed 2×VDD output buffer with PVTL detection using 40-nm ..."

Chua-Chin Wang, Tsung-Yi Tsai, Wei Lin (2015)

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DOI: 10.1109/ICICDT.2015.7165914

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Chua-Chin Wang, Tsung-Yi Tsai, Wei Lin:
A high-speed 2×VDD output buffer with PVTL detection using 40-nm CMOS technology. ICICDT 2015: 1-4

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