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"SystemVerilog-Based Modeling and Verification of 40-Gb/s/Lane PAM-3 ..."
Yong-Gyu Yu et al. (2025)
- Yong-Gyu Yu, Ju-Hyeong Yun, Chae-Hyeon Lim, Joo-Hyung Chae:

SystemVerilog-Based Modeling and Verification of 40-Gb/s/Lane PAM-3 Transmitter for USB4.0 Gen4. SMACD 2025: 1-4

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