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"FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption ..."

Reza Rezaeian Farashahi, Bahram Rashidi, Sayed Masoud Sayedi (2014)

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DOI: 10.1016/J.MEJO.2014.05.004

access: closed

type: Journal Article

metadata version: 2023-10-22

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Reza Rezaeian Farashahi, Bahram Rashidi, Sayed Masoud Sayedi:
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm. Microelectron. J. 45(8): 1014-1025 (2014)

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