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ORCIDSayed Masoud Sayedi
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2020 – today
- 2025
[j26]Zahra Mehdizadeh Taheri
, Sayed Masoud Sayedi, Mohammad Hossein Moaiyeri:
Spintronic Content Addressable Memory With Integrated Boolean Logic and Arithmetic Functions. IEEE Access 13: 49076-49091 (2025)- 2023
- [j25]Elias Rajaby, Sayed Masoud Sayedi, Ehsan Yazdian:
Hardware design and implementation of high-efficiency cube-root of complex numbers. Microprocess. Microsystems 100: 104847 (2023) - 2022
- [j24]Elias Rajaby, Sayed Masoud Sayedi:
A structured review of sparse fast Fourier transform algorithms. Digit. Signal Process. 123: 103403 (2022)
2010 – 2019
- 2018
- [j23]Mohammad Radpour, Sayed Masoud Sayedi:
SystemC-AMS modeling of photodiode based on PWL technique to be used in energy harvesting CMOS image sensor. Integr. 60: 48-55 (2018) - [j22]Mohammad Fardad, Sayed Masoud Sayedi, Ehsan Yazdian:
A Low-Complexity Hardware for Deterministic Compressive Sensing Reconstruction. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3349-3361 (2018) - [j21]Mohammad Fardad, Sayed Masoud Sayedi, Ehsan Yazdian:
Hardware Implementation of Iterative Method With Adaptive Thresholding for Random Sampling Recovery of Sparse Signals. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 867-877 (2018) - 2017
- [j20]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
Efficient and low-complexity hardware architecture of Gaussian normal basis multiplication over GF(2 m ) for elliptic curve cryptosystems. IET Circuits Devices Syst. 11(2): 103-112 (2017) - [j19]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
Full-custom hardware implementation of point multiplication on binary Edwards curves for application-specific integrated circuit elliptic curve cryptosystem applications. IET Circuits Devices Syst. 11(6): 568-578 (2017) - [j18]Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi:
High-performance and high-speed implementation of polynomial basis Itoh-Tsujii inversion algorithm over GF(2 m ). IET Inf. Secur. 11(2): 66-77 (2017) - [j17]Mohammad Reza Mahmoodi, Sayed Masoud Sayedi, Fariba Karimi:
Color-based skin segmentation in videos using a multi-step spatial method. Multim. Tools Appl. 76(7): 9785-9801 (2017) - [i3]Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi:
High-speed Hardware Implementations of Point Multiplication for Binary Edwards and Generalized Hessian Curves. IACR Cryptol. ePrint Arch. 2017: 5 (2017) - 2016
- [j16]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
Efficient implementation of bit-parallel fault tolerant polynomial basis multiplication and squaring over GF(2 m ). IET Comput. Digit. Tech. 10(1): 18-29 (2016) - [j15]Kourosh Hassanli, Sayed Masoud Sayedi, Rasoul Dehghani, Armin Jalili, J. Jacob Wikner:
A low-power wide tuning-range CMOS current-controlled oscillator. Integr. 55: 57-66 (2016) - [j14]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2m). Integr. 55: 138-154 (2016) - [j13]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
High-speed hardware architecture of scalar multiplication for binary elliptic curve cryptosystems. Microelectron. J. 52: 49-65 (2016) - [i2]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
High-speed VLSI implementation of Digit-serial Gaussian normal basis Multiplication over GF(2m). IACR Cryptol. ePrint Arch. 2016: 966 (2016) - 2015
- [j12]Mohammad Reza Mahmoodi, Sayed Masoud Sayedi:
A face detection method based on kernel probability map. Comput. Electr. Eng. 46: 205-216 (2015) - [j11]Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi:
Efficient implementation of low time complexity and pipelined bit-parallel polynomial basis multiplier over binary finite fields. ISC Int. J. Inf. Secur. 7(2): 101-114 (2015) - [i1]Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi:
Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems. IACR Cryptol. ePrint Arch. 2015: 1109 (2015) - 2014
- [j10]Reza Rezaeian Farashahi, Bahram Rashidi, Sayed Masoud Sayedi:
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm. Microelectron. J. 45(8): 1014-1025 (2014) - [c9]Bahram Rashidi, Reza Rezaeian Farashahi, Sayed Masoud Sayedi:
High-speed and pipelined finite field bit-parallel multiplier over GF(2m) for elliptic curve cryptosystems. ISCISC 2014: 15-20 - 2013
- [j9]Shirin Pourashraf, Sayed Masoud Sayedi:
Implementation of a low power 16-bit radix-4 pipelined SRT divider using a modified Split-Path Data Driven Dynamic Logic (SPD3L) structure. Microelectron. J. 44(12): 1165-1174 (2013) - 2012
- [c8]Hesam Ahmadi, Sayed Masoud Sayedi:
Design of a neuromorphic edge detector vision chip with color and intensity change disambiguation. CCECE 2012: 1-5 - [c7]Mehrnaz Ahmady, Sayed Masoud Sayedi:
Fault coverage improvement and test vector generation for combinational circuits using spectral analysis. CCECE 2012: 1-5 - [c6]Shirin Pourashraf, Sayed Masoud Sayedi:
A low power D3L 16-bit radix- 4 pipelined SRT divider. CCECE 2012: 1-6 - 2011
- [j8]Mehdi Habibi, Sayed Masoud Sayedi:
Asynchronous demodulation technique for use in vision sensor image classification and segmentation. Int. J. Circuit Theory Appl. 39(1): 17-30 (2011) - [j7]Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner, Abolghasem Zeidaabadi Nezhad:
A nonlinearity error calibration technique for pipelined ADCs. Integr. 44(3): 229-241 (2011) - [j6]Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner:
Inter-channel offset and gain mismatch correction for time-interleaved pipelined ADCs. Microelectron. J. 42(1): 158-164 (2011) - 2010
- [j5]Mehdi Habibi, Masoud Sayedi:
Geometric centre tracking of tagged objects using a low power demodulation smart vision sensor. IET Circuits Devices Syst. 4(1): 67-77 (2010) - [j4]Hossein Karimiyan, Sayed Masoud Sayedi, Hossein Saidi:
Low-power dual-edge triggered state-retention scan flip-flop. IET Comput. Digit. Tech. 4(5): 410-419 (2010) - [j3]Mehdi Habibi, Sayed Masoud Sayedi:
Asynchronous demodulation CMOS sensor for object labeling and its application in robotics. Ind. Robot 37(1): 62-69 (2010) - [c5]Armin Jalili, Sayed Masoud Sayedi, J. Jacob Wikner, Kent Palmkvist, Mark Vesterbacka:
Calibration of high-resolution flash ADCS based on histogram test methods. ICECS 2010: 114-117
2000 – 2009
- 2009
- [j2]Mehdi Habibi, Masoud Sayedi:
An Analog VLSI Architecture for High Speed, Low Power Object Tracking. Int. J. Distributed Sens. Networks 5(6): 675-692 (2009) - [c4]Hossein Karimiyan, Sayed Masoud Sayedi, Hossein Saidi:
Low-Power Dual-Edge Triggered State Retention Scan Flip-Flop. PATMOS 2009: 156-164 - 2008
- [j1]Ebrahim Farshidi, Sayed Masoud Sayedi:
A 1.2 V current-mode true RMS-DC converter based on the floating gate MOS translinear principle. Microelectron. J. 39(2): 293-298 (2008) - [c3]Armin Jalili, Sayed Masoud Sayedi:
A nonlinearity error calibration technique based on an opamp distortion modeling. APCCAS 2008: 806-809 - [c2]Armin Jalili, Sayed Masoud Sayedi, Rasoul Dehghani, Ebrahim Farshidi:
A frequency based digital background calibration technique for pipelined ADCs. ICECS 2008: 1209-1212 - 2006
- [c1]Dawood Shekari Beyragh, Sayed Masoud Sayedi, Hamid Reza Karshenas:
A Novel Digital Voltage Controller for Single-Phase PFC Rectifiers. CCECE 2006: 887-890
Coauthor Index
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