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"Design of Last-Level On-Chip Cache Using Spin-Torque Transfer RAM (STT RAM)."

Wei Xu et al. (2011)

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DOI: 10.1109/TVLSI.2009.2035509

access: closed

type: Journal Article

metadata version: 2022-07-04

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  - https://dblp.org/rec/journals/tvlsi/XuSWCZ11
Wei Xu, Hongbin Sun, Xiaobin Wang, Yiran Chen, Tong Zhang:
Design of Last-Level On-Chip Cache Using Spin-Torque Transfer RAM (STT RAM). IEEE Trans. Very Large Scale Integr. Syst. 19(3): 483-493 (2011)

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