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Publication search results
found 71 matches
- 2006
- Ralf Laue, Sorin A. Huss:
A novel memory architecture for elliptic curve cryptography with parallel modular multipliers. FPT 2006: 149-156 - Edmund Lee, Guy Lemieux, Shahriar Mirabbasi:
Interconnect driver design for long wires in field-programmable gate arrays. FPT 2006: 89-96 - Shohei Abe, Yohei Hasegawa, Takao Toi, Takeshi Inuo, Hideharu Amano:
An adaptive Viterbi decoder on the dynamically reconfigurable processor. FPT 2006: 285-288 - Jacobo Álvarez, Alfonso Lago, Andres Nogueiras, Carlos Martinez-Peñalver, Jorge Marcos, Jesús Doval-Gandoy, Óscar Lopez:
FPGA implementation of a fuzzy controller for automobile DC-DC converters. FPT 2006: 237-240 - David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil:
FADES: a fault emulation tool for fast dependability assessment. FPT 2006: 221-228 - Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung:
The cost of data dependence in motion vector estimation for reconfigurable platforms. FPT 2006: 333-336 - Maria E. Angelopoulou, Konstantinos Masselos, Peter Y. K. Cheung, Yiannis Andreopoulos:
A comparison of 2-D discrete wavelet transform computation schedules on FPGAs. FPT 2006: 181-188 - Sudarshan Banerjee, Elaheh Bozorgzadeh, Juanjo Noguera, Nikil D. Dutt:
Minimizing peak power for application chains on architectures with partial dynamic reconfiguration. FPT 2006: 273-276 - Samuel Bayliss, Christos-Savvas Bouganis, George A. Constantinides, Wayne Luk:
An FPGA implementation of the simplex algorithm. FPT 2006: 49-56 - João Bispo, Ioannis Sourdis, João M. P. Cardoso, Stamatis Vassiliadis:
Regular expression matching for reconfigurable packet inspection. FPT 2006: 119-126 - Nathalie Bochard, Alain Aubert, Virginie Fresse:
An adaptive and predictive architecture for parameterised PIV algorithms. FPT 2006: 241-244 - Christos-Savvas Bouganis, Iosifina Pournara, Peter Y. K. Cheung:
A statistical framework for dimensionality reduction implementation in FPGAs. FPT 2006: 365-368 - Nathalie Chan King Choy, Steven J. E. Wilton:
Activity-based power estimation and characterization of DSP and multiplier blocks in FPGAs. FPT 2006: 253-256 - Bradley D. Christiansen, Yong C. Kim, Robert W. Bennington, Christopher J. Ristich:
Decoy circuits for FPGA design protection. FPT 2006: 373-376 - Nathaniel Couture, Kenneth B. Kent:
Periodic licensing of FPGA based intellectual property. FPT 2006: 357-360 - Dan Cyca, Laurence E. Turner:
A C compiler for implementing FPGA based bit-serial DSP systems. FPT 2006: 305-308 - Hendrik Eeckhaut, Mark Christiaens, Dirk Stroobandt, Vincent Nollet:
Optimizing the critical loop in the H.264/AVC CABAC decoder. FPT 2006: 113-118 - Haohuan Fu, Oskar Mencer, Wayne Luk:
Comparing floating-point and logarithmic number representations for reconfigurable acceleration. FPT 2006: 337-340 - Altaf Abdul Gaffar, Jonathan A. Clarke, George A. Constantinides:
PowerBit - power aware arithmetic bit-width optimization. FPT 2006: 289-292 - Altaf Abdul Gaffar, Jonathan A. Clarke, George A. Constantinides:
Modeling of glitch effects in FPGA based arithmetic circuits. FPT 2006: 349-352 - Ning Ge, Yuyu Liu, Huazhong Yang, Hui Wang:
Sigma-delta based clock recovery using on-chip PLL in FPGA. FPT 2006: 135-140 - David Grant, Guy Lemieux:
Perturber: semi-synthetic circuit generation using ancestor control for testing incremental place and route. FPT 2006: 189-196 - Peter J. Green, Desmond P. Taylor:
Implementation of a real-time multiple input multiple output channel estimator on the smart antenna software radio test system platform using the Xilinx Virtex 2 Pro Field Programmable Gate Array. FPT 2006: 257-260 - Geoff Hall:
Invited Keynote 2: Applications of programmable logic in modern particle physics experiments. FPT 2006 - Abdulrahman Hanoun, Wael Adi, Friedrich Mayer-Lindenberg, Bassel Soudan:
Fuzzy modular multiplication architecture and low complexity IPR-protection for FPGA technology. FPT 2006: 325-328 - Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike:
Evaluation of granularity on threshold voltage control in flex power FPGA. FPT 2006: 17-24 - Masato Inagi, Yasuhiro Takashima, Yuichi Nakamura, Yoji Kajitani:
A performance-driven circuit bipartitioning algorithm for multi-FPGA implementation with time-multiplexed I/Os. FPT 2006: 361-364 - Peter Jamieson, Jonathan Rose:
Enhancing the area-efficiency of FPGAs with hard circuits using shadow clusters. FPT 2006: 1-8 - Wu Jigang, Thambipillai Srikanthan, Tao Jiao:
Efficient algorithm for functional scheduling in hardware/software co-design. FPT 2006: 65-72 - Phillip H. Jones, Young H. Cho, John W. Lockwood:
An adaptive frequency control method using thermal feedback for reconfigurable hardware applications. FPT 2006: 229-236
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retrieved on 2024-06-09 20:04 CEST from data curated by the dblp team
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