• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 30 matches

• 1999
• 
  Santosh G. Abraham, Scott A. Mahlke:
  Automatic and Efficient Evaluation of Memory Hierarchies for Embedded Systems. MICRO 1999: 114-125
• 
  David H. Albonesi:
  Selective Cache Ways: On-Demand Cache Resource Allocation. MICRO 1999: 248-259
• 
  Todd M. Austin:
  DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design. MICRO 1999: 196-207
• 
  Jay Bharadwaj, Kishore N. Menezes, Chris McKinsey:
  Wavefront Scheduling: Path based Data Representation and Scheduling of Subgraphs. MICRO 1999: 262-271
• 
  Sangyeun Cho, Pen-Chung Yew, Gyungho Lee:
  Access Region Locality for High-Bandwidth Processor Memory System Design. MICRO 1999: 136-146
• 
  Jamison D. Collins, Dean M. Tullsen:
  Hardware Identification of Cache Conflict Misses. MICRO 1999: 126-135
• 
  Daniel A. Connors, Wen-mei W. Hwu:
  Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results. MICRO 1999: 158-169
• 
  Jesús Corbal, Roger Espasa, Mateo Valero:
  Exploiting a New Level of DLP in Multimedia Applications. MICRO 1999: 72-79
• 
  Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind:
  Optimizations and Oracle Parallelism with Dynamic Translation. MICRO 1999: 284-295
• 
  Alexandre E. Eichenberger, Waleed Meleis:
  Balance Scheduling: Weighting Branch Tradeoffs in Superblocks. MICRO 1999: 272-283
• 
  Timothy H. Heil, Zak Smith, James E. Smith:
  Improving Branch Predictors by Correlating on Data Values. MICRO 1999: 28-37
• 
  Artur Klauser, Dirk Grunwald:
  Instruction Fetch Mechanisms for Multipath Execution Processors. MICRO 1999: 38-47
• 
  Sergei Y. Larin, Thomas M. Conte:
  Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors. MICRO 1999: 82-92
• 
  Lea Hwang Lee, Jeff Scott, Bill Moyer, John Arends:
  Low-Cost Branch Folding for Embedded Applications with Small Tight Loops. MICRO 1999: 103-111
• 
  Charles Lefurgy, Eva Piccininni, Trevor N. Mudge:
  Evaluation of a High Performance Code Compression Method. MICRO 1999: 93-102
• 
  Pedro Marcuello, Jordi Tubella, Antonio González:
  Value Prediction for Speculative Multithreaded Architectures. MICRO 1999: 230-236
• 
  Tulika Mitra, Tzi-cker Chiueh:
  Dynamic 3D Graphics Workload Characterization and the Architectural Implications. MICRO 1999: 62-71
• 
  Teresa Monreal, Antonio González, Mateo Valero, José González, Víctor Viñals:
  Delaying Physical Register Allocation through Virtual-Physical Registers. MICRO 1999: 186-192
• 
  Andreas Moshovos, Gurindar S. Sohi:
  Read-After-Read Memory Dependence Prediction. MICRO 1999: 177-185
• 
  Enric Musoll:
  Predicting the Usefulness of a Block Result: A Micro-Architectural Technique for High-Performance Low-Power Processors. MICRO 1999: 238-247
• 
  Soner Önder, Rajiv Gupta:
  Dynamic Memory Disambiguation in the Presence of Out-of-Order Store Issuing. MICRO 1999: 170-176
• 
  Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew K. Farrens, Aneet Chopra:
  Exploiting ILP in Page-based Intelligent Memory. MICRO 1999: 208-218
• 
  Vijay S. Pai, Sarita V. Adve:
  Code Transformations to Improve Memory Parallelism. MICRO 1999: 147-155
• 
  Fred J. Pollack:
  New Microarchitecture Challenges in the Coming Generations of CMOS Process Technologies. MICRO 1999: 2-
• 
  Glenn Reinman, Brad Calder, Todd M. Austin:
  Fetch Directed Instruction Prefetching. MICRO 1999: 16-27
• 
  Eric Rotenberg, James E. Smith:
  Control Independence in Trace Processors. MICRO 1999: 4-15
• 
  Bruce D. Shriver:
  Core Technologies in Hardware and Software. MICRO 1999: 194-
• 
  Andrew Wolfe, Derek B. Noonburg:
  A Superscalar 3D Graphics Engine. MICRO 1999: 50-61
• 
  Craig B. Zilles, Joel S. Emer, Gurindar S. Sohi:
  The Use of Multithreading for Exception Handling. MICRO 1999: 219-229
• 
  Ronny Ronen, Matthew K. Farrens, Ilan Y. Spillinger:
  Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 32, Haifa, Israel, November 16-18, 1999. ACM/IEEE Computer Society 1999, ISBN 0-7695-0437-X [contents]