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33rd ARCS 2020: Aachen, Germany
- André Brinkmann
, Wolfgang Karl, Stefan Lankes
, Sven Tomforde
, Thilo Pionteck
, Carsten Trinitis
:
Architecture of Computing Systems - ARCS 2020 - 33rd International Conference, Aachen, Germany, May 25-28, 2020, Proceedings. Lecture Notes in Computer Science 12155, Springer 2020, ISBN 978-3-030-52793-8
Main Concerence
- Mostafa M. Abbas
, Rasha Salah Omar, Ahmed El-Mahdy
, Erven Rohou
:
Approximate Data Dependence Profiling Based on Abstract Interval and Congruent Domains. 3-16 - Thomas Becker, Tobias Schüle:
Evaluating Dynamic Task Scheduling with Priorities and Adaptive Aging in a Task-Based Runtime System. 17-31 - Alwyn Burger
, Patrick Urban
, Jayson Boubin
, Gregor Schiele
:
An Architecture for Solving the Eigenvalue Problem on Embedded FPGAs. 32-43 - Alexander Dörflinger, Yejun Guan, Sören Michalik, Sönke Michalik, Jamin Naghmouchi, Harald Michalik:
ECC Memory for Fault Tolerant RISC-V Processors. 44-55 - Gereon Führ, Ahmed Hallawa, Rainer Leupers, Gerd Ascheid, Juan Fernando Eusse:
3D Optimisation of Software Application Mappings on Heterogeneous MPSoCs. 56-68 - Eric Hutter, Uwe Brinkschulte:
Towards a Priority-Based Task Distribution Strategy for an Artificial Hormone System. 69-81 - Michael Müller, Thomas Leich, Thilo Pionteck
, Gunter Saake, Jens Teubner, Olaf Spinczyk:
He..ro DB: A Concept for Parallel Data Processing on Heterogeneous Hardware. 82-96 - Christian Piatka, Rico Amslinger, Florian Haas, Sebastian Weis, Sebastian Altmeyer, Theo Ungerer:
Investigating Transactional Memory for High Performance Embedded Systems. 97-108 - Sven Rheindt, Andreas Fried, Oliver Lenke, Lars Nolte, Temur Sabirov, Tim Twardzik, Thomas Wild, Andreas Herkersdorf:
X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-Based MPSoCs. 109-123 - Alexander Schwarz, Christian Hochberger:
Engineering an Optimized Instruction Set Architecture for AMIDAR Processors. 124-137 - Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann
, Rainer Leupers, Sascha Kegreiß:
Scaling Logic Locking Schemes to Multi-module Hardware Designs. 138-152 - Bo Wang, Aneek Imtiaz, Joachim Falk, Michael Glaß, Jürgen Teich:
Exploration of Power Domain Partitioning with Concurrent Task Mapping and Scheduling for Application-Specific Multi-core SoCs. 153-167
FORMUS3IC Workshop
- Andrea Reindl
, Hans Meier
, Michael Niemetz
:
Scalable, Decentralized Battery Management System Based on Self-organizing Nodes. 171-184 - Tobias Frauenschläger, Sebastian Renner, Jürgen Mottok:
Security Improvements by Separating the Cryptographic Protocol from the Network Stack onto a Multi-MCU Architecture. 185-199 - Manuel Dentgen, Sebastian Renner, Jürgen Mottok:
Equally Distributed Bus-Communication Access Rights for Inter MCU Communication Using Multimaster SPI. 200-212
Workshop on Computer Architectures in Space (CompSpace)
- Corrado De Sio
, Sarah Azimi
, Luca Sterpone:
On the Evaluation of SEU Effects on AXI Interconnect Within AP-SoCs. 215-227 - Gasper Skvarc Bozic, Thomas Unterlinner, Tanja Eraerds, Sabine Ott, Markus Plattner:
Satellite Onboard Data Reduction Using a Risc-V Core Inside an RTG4-Based Data Processing Pipeline. 228-238
Workshop on Parallel Systems and Algorithms (PASA)
- Florian Fritz, Michael Schmid
, Jürgen Mottok:
Accelerating Real-Time Applications with Predictable Work-Stealing. 241-255
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