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ORCIDESA/VLSI 2004: Las Vegas, Nevada, USA
- Hamid R. Arabnia, Minyi Guo, Laurence Tianruo Yang:
Proceedings of the International Conference on Embedded Systems and Applications, ESA '04 & Proceedings of the International Conference on VLSI, VLSI '04, June 21-24, 2004, Las Vegas, Nevada, USA. CSREA Press 2004, ISBN 1-932415-41-6
Workshop: Methodologies in Low Power Design (MLPD'04)
- Venkiteswaran Anantharam, Maojiao He, Krishna Natarajan, Huikai Xie, Michael P. Frank:
Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators. ESA/VLSI 2004: 5-11 - Ahmed Elkammar, Srinivasa Vemuru, Norman Scheinberg:
A Bus Encoding Scheme to Reduce Power Consuming Signal Transitions. ESA/VLSI 2004: 12-17 - Smith Castillo, Naveen K. Samala, Kerron Manwaring, Baback A. Izadi, Damu Radhakrishnan:
Experimental Analysis of Batteries Under Continuous and Intermittent Operations. ESA/VLSI 2004: 18-24 - Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi:
A Low Energy Deep Sub-Micron Bus Coding Technique. ESA/VLSI 2004: 25-30 - Fun Ye, Jen-Shiun Chiang, Chun-Cheng Wu:
Low Power Sigma-Delta Modulator with Dynamic Biasing for Speech CODECs. ESA/VLSI 2004: 31-35 - Cheng-Chih Chien, Jen-Shiun Chiang, Ming-Hung Tu, Yu-Cheng Sung, Yi-Tsung Lee:
Low-Power Switched-Capacitor Filters for Telecommunication Applications. ESA/VLSI 2004: 36-39 - Yong Liu, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Damu Radhakrishnan:
A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform. ESA/VLSI 2004: 40-46 - Rakesh Menon, Sarita Chennupati, Naveen K. Samala, Damu Radhakrishnan, Baback A. Izadi:
Switching Activity Minimization in Combinational Logic Design. ESA/VLSI 2004: 47-53 - Jayapreetha Natesan, Damu Radhakrishnan:
A Novel Bus Encoding Technique for Low Power VLSI. ESA/VLSI 2004: 54-62
Code Generation & Optimization of Embedded Programs
- Keith S. Vallerio, Niraj K. Jha:
Evaluating Conditional Statements in Embedded System Software: Systematic Methodologies for Reducing Energy Consumption. ESA/VLSI 2004: 63-69 - Matias Madou, Bjorn De Sutter, Bruno De Bus, Ludo Van Put, Koen De Bosschere:
Link-Time Compaction of MIPS Programs. ESA/VLSI 2004: 70-75 - Darrin M. Hanna, Richard E. Haskell:
Implementing Software Programs in FPGAs Using Flowpaths. ESA/VLSI 2004: 76-82 - Andrzej Bednarski, Christoph W. Keßler:
Exploiting Symmetries for Optimal Integrated Code Generation. ESA/VLSI 2004: 83-92
Sensor-Actuator Networks for Engineering
- Niranjan Regatte, Carl Larsen, Sarangapani Jagannathan:
A New Fair Scheduling MAC Protocol for Wireless Sensor Networks. ESA/VLSI 2004: 93-98 - T. L. Bharatheesh, S. Sitharama Iyengar:
Predictive Data Mining for Delinquency Modeling. ESA/VLSI 2004: 99-105 - Sheikh Iqbal Ahamed, Avinash Vyas:
Challenges in Monitoring Sensor Networks and a Solution Framework. ESA/VLSI 2004: 106-112 - Nader F. Mir:
A Self-Organizing Wireless Sensor Network. ESA/VLSI 2004: 113-122
Hardware/Software Co-Design
- David A. Zier, Jumnit Hong, Savithri Venkatachalapathy, Jarrod A. Nelson, John Mark Matson, Ben Lee, Younghwan Bae, Hanjin Cho:
X32V: A Design of Configurable Processor Core for Embedded Systems. ESA/VLSI 2004: 123-129 - Thomas Preußer, Steffen Köhler, Rainer G. Spallek:
RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing. ESA/VLSI 2004: 130-135 - Ying Qiao, Luqi:
Admission Control for Dynamic Software Reconfiguration in Systems of Embedded Systems. ESA/VLSI 2004: 136-144
System-On-A-Chip & Embedded Architectures
- Jeff Willis, Amit Gaur, Scott Cannon:
An Intelligent Communications Backplane Architecture. ESA/VLSI 2004: 145-150 - Mars Lan, Morteza Biglari-Abhari:
An Adaptive Superscalar Architecture for Embedded Systems. ESA/VLSI 2004: 151-156 - Sebastian Wallner:
A Configurable System-on-Chip Architecture with Descriptors for Dynamic Reconfiguration. ESA/VLSI 2004: 157-163 - Zoran A. Salcic, Partha S. Roop, Dong Hui, Ivan Radojevic:
HiDRA: A New Architecture for Heterogeneous Embedded Systems. ESA/VLSI 2004: 164-170 - Stephen Bique:
Embedded Software for an Array of Processors. ESA/VLSI 2004: 171-175 - Enoch Hwang:
Building A Custom System-On-A-Chip. ESA/VLSI 2004: 176-184
Java Technology for Embedded Systems
- Keith S. Vallerio, Niraj K. Jha:
Language Selection for Mobile Systems: Java, C, or Both? ESA/VLSI 2004: 185-191 - Diarmuid P. O'Donoghue, James F. Power:
Identifying and Evaluating a Generic Set of Superinstructions for Embedded Java Programs. ESA/VLSI 2004: 192-198 - A-Qun Deng, Huan-Jun Yu, Shang-Xu Hu:
Realization of Platform Based on Java Technology for Embedded Systems. ESA/VLSI 2004: 199-205 - Sung-Lim Yun, Dong-Keun Nam, Se Man Oh, Jung-Sook Kim:
Virtual Machine Code for Embedded Systems. ESA/VLSI 2004: 206-214
Real-Time & Embedded OS
- Deji Chen, Aloysius K. Mok:
Scheduling Similarity-Constrained Real-Time Tasks. ESA/VLSI 2004: 215-221 - Jason Garbutt, Sabu John, Thurai Vinay:
Embedded Systems for Real-Time Control of Differential Drive WMR. ESA/VLSI 2004: 222-228 - Hyung Jung Kim, Deock Gu Jee, Man Ho Park, Byung Sik Yoon, Song In Choi:
The Real-Time Implementations of AMR Codec for IMT-2000 System. ESA/VLSI 2004: 229-232 - Ye Su, Gurdip Singh:
Synchronization in CAN-Based Embedded Systems. ESA/VLSI 2004: 233-239 - Kyong Hoon Kim, Jong Kim, Sung Je Hong:
Best-Effort Scheduling (m, k)-Firm Real-Time Tasks Based on the (m, k)-Firm Constraint Meeting Probability. ESA/VLSI 2004: 240-248
Testing & Verification
- Suboh A. Suboh, Nikitas A. Alexandridis, Tarek A. El-Ghazawi:
Performance Analysis Techniques in SOC Design. ESA/VLSI 2004: 249-255 - Jan Traumueller:
Flexible Internet Based Diagnostics of Embedded Systems. ESA/VLSI 2004: 256-262 - Zille Huma Kamal, Mohammad Ali Salahuddin, Ajay Gupta, Mark G. Terwilliger, Vijay Bhuse, Benjamin Beckmann:
Analytical Analysis of Data and Decision Fusion in Sensor Networks. ESA/VLSI 2004: 263-272
Application-Specific Devices & Resource Management
- Young Yee, Edward Vidal Jr.:
Embedded Systems for Meteorological Sensor Applications. ESA/VLSI 2004: 273-279 - Achim Ibenthal, Christoph Minkwitz, Mathias Lindner:
Multimedia Architectures of Mobile Phones. ESA/VLSI 2004: 280-283 - R. Athinarayanan, J. N. Dahiya, J. A. Roberts:
A Software Linearization Technique Using Embedded Applications for Measuring Microwave Dielectric Response of Materials. ESA/VLSI 2004: 284-288 - Hyung Jung Kim, Deock Gu Jee, Man Ho Park, Byung Sik Yoon, Song In Choi:
DSP Implementations of 3D Sound System Using HRTF. ESA/VLSI 2004: 289-292 - En-Hsin Huang, Tzilla Elrad:
Intelligent Resource Agents for Embedded Systems. ESA/VLSI 2004: 293-302
Biological & Quantum Computing
- Scott F. Smith:
A Scalable Coprocessor for Bioinformatic Sequence Alignments. ESA/VLSI 2004: 303-308 - John Robert Burger:
Novel Quantum Computer Emulator Chip. ESA/VLSI 2004: 309-315 - X. Zhang, Gabriel Dragffy, Anthony G. Pipe:
Repair of the Genetic Material in Biologically Inspired Embryonic-Cell-Based Systems. ESA/VLSI 2004: 316-324
Low Power
- Shahzad Nazar, Behrooz A. Shirazi, Sungyong Jung:
Performance/Energy Efficiency Analysis of Register Files in Superscalar Processors. ESA/VLSI 2004: 325-331 - Ahmed Sayed, Hussain Al-Asaad:
Survey and Evaluation of Low-Power Full-Adder Cells. ESA/VLSI 2004: 332-338 - S. M. Rezaul Hasan, Nazmul Ula:
A 4GHz Low-Power Folded-Cascode CMOS LC Quadrature VCO for RF Transceivers. ESA/VLSI 2004: 339-342 - Pasquale Corsonello, Stefania Perri, Vitit Kantabutra:
Area- and Power-Reduced Standard-Cell Spanning Tree Adders. ESA/VLSI 2004: 343-352
Testing & Verification
- Der-Haw Wang, Salam N. Salloum:
Fault-Tolerance Analysis of Some Sorting Networks for Single and Multiple Passes. ESA/VLSI 2004: 353-359 - Jing Zhong, Jon C. Muzio:
An Investigation of Non-Linear Machines as PRPGs in BIST. ESA/VLSI 2004: 360-366 - Bassam Shaer, Kailash Aurangabadkar:
An Automated Algorithm for Partitioning Sequential VLSI Circuits. ESA/VLSI 2004: 367-373 - Yinhe Han, Xiaowei Li:
Simultaneous Reduction of Test Data Volume and Testing Power for Scan-Based Test. ESA/VLSI 2004: 374-381
System/Network-On-Chip
- Stephen Bates:
VLSI Issues for the Implementation of 10GBASE-T Ethernet. ESA/VLSI 2004: 382-386 - Nagendra Bhargava Bharatula, Stijn Ossevoort, Paul Lukowicz, Gerhard Tröster:
Reliability Modelling of Embedded System-in-a-Package: Design and Packaging Issues. ESA/VLSI 2004: 387-392 - Hector Arteaga, Hussain Al-Asaad:
Approaches for Monitoring Vectors on Microprocessor Buses. ESA/VLSI 2004: 393-398 - Lubomir Ivanov:
Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications. ESA/VLSI 2004: 399-406
High Speed/Performance
- Scott C. Smith:
Designing NULL Convention Combinational Circuits to Fully Utilize Gate-Level Pipelining for Maximum Throughput. ESA/VLSI 2004: 407-412 - Himanshu Thapliyal, Hamid R. Arabnia:
High Speed Efficient N Bit by N Bit Division Algorithm and Architecture Based on Ancient Indian Vedic Mathematics. ESA/VLSI 2004: 413-416 - James Levy, Jabulani Nyathi:
A High Performance, Low Area Overhead Carry Lookahead Adder. ESA/VLSI 2004: 417-426
Session: Device & Circuit Designs - I
- Viktor Bunimov, Manfred Schimmler:
High Radix Modular Multiplication of Large Integers Optimised with Respect to Area and Time. ESA/VLSI 2004: 427-433 - Himanshu Thapliyal, Hamid R. Arabnia:
A Time-Area-Power Efficient Multiplier and Square Architecture Based on Ancient Indian Vedic Mathematics. ESA/VLSI 2004: 434-439 - Himanshu Thapliyal, Hamid R. Arabnia:
A Novel Parallel Multiply and Accumulate (V-MAC) Architecture Based on Ancient Indian Vedic Mathematics. ESA/VLSI 2004: 440-446
Device & Circuit Designs - II
- Scott C. Smith:
Design of a NULL Convention Self-Timed Divider. ESA/VLSI 2004: 447-453 - Jie Long, Robert J. Weber:
A 2.4GHz CMOS Direct Down-Conversion Mixer. ESA/VLSI 2004: 454-457 - Ronald F. DeMara, Amit Kejriwal, Jude Seeber:
Feedback Techniques for Dual-Rail Self-Timed Circuits. ESA/VLSI 2004: 458-464 - Kamala Hariharan, Shoba Krishnan, V. P. Gopinath:
Impact of Gate Leakage on the Performance of Analog Integrated Circuits - A Simulation Study. ESA/VLSI 2004: 465-474
Logic Design
- Xin Jia, Ranga Vemuri:
A Design Methodology for Self-Timed Event Logic Pipelines. ESA/VLSI 2004: 475-479 - Dilip P. Vasudevan, Parag K. Lala:
A New Reversible Logic Gate and its Applications. ESA/VLSI 2004: 480-484 - Kazuya Shinozuka:
A Graph Approach to Two-Level Logic Minimization. ESA/VLSI 2004: 485-490 - P. W. Chandana Prasad, Ali Assi, Mohamed Raseen:
BDD Minimization Using Graph Parameter Permutation. ESA/VLSI 2004: 491-496
FPGA
- Peng Du, Gary William Grewal, Shawki Areibi, Dilip K. Banerji:
A Fast Hierarchical Approach to FPGA Placement. ESA/VLSI 2004: 497-503 - Jong Kang Park, Jong Tae Kim, Myung Chul Shin:
High Performance Single Chip Implementation for a Digital Protective Relay Using FPGA. ESA/VLSI 2004: 504-508 - S. P. Joy Vasantha Rani, P. Kanagasabapathy:
Design of Neural Network on FPGA. ESA/VLSI 2004: 509-512 - Chao-Ming Tseng, Chih-Sheng Chen, Chua-Huang Huang:
Quantum Gates Revisited: A Tensor Product Based Interpretation Model. ESA/VLSI 2004: 513-522
High Performance, Low Power VLSI Design
- David J. Betowski, Daniel Dwyer, Valeriu Beiu:
A Novel Segmented Parabolic Sine Approximation for Direct Digital Frequency Synthesizers. ESA/VLSI 2004: 523-529 - Andy Widjaja, José G. Delgado-Frias:
An H-Tree Based Configuration Scheme for Reconfigurable DSP Hardware. ESA/VLSI 2004: 530-535 - Ray Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias:
A Distributed FIFO Scheme for System on Chip Inter-Component Communication. ESA/VLSI 2004: 536-540 - Valeriu Beiu, Mawahib H. Sulieman:
Optimal Practical Perceptron Addition Application to Single Electron Technology. ESA/VLSI 2004: 541-550
Applications
- Howard E. Michel, David Rancour, Sushanth Iringentavida:
CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks. ESA/VLSI 2004: 551-557 - YunKyung Lee, Sangwoo Lee, Youngsae Kim:
AES Crypto-Processor Design Supporting 128/192/256 Bits Input Key Length for Smart Card. ESA/VLSI 2004: 558-563 - Deng Lei, Wen Gao, Ming-Zeng Hu, Zhenzhou Ji:
An Efficient VLSI Architecture for MC Interpolation in AVC Video Coding. ESA/VLSI 2004: 564-568 - Sang-Woo Lee, Jeong-Nyeo Kim, Jong-Soo Jang:
An Efficient Divider Architecture over GF(2m) for Elliptic Curve Cryptography. ESA/VLSI 2004: 569-576
Late Papers
- Li-Chuan Weng, Xiaojun Wang, Alan P. Su, Bin Liu:
Low Power Heuristic Block-level Voltage/Frequency Scheduling. ESA/VLSI 2004: 577-581 - Hamid R. Zarandi, Seyed Ghassem Miremadi, Shaahin Hessabi, Ali Reza Ejlali:
A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models. ESA/VLSI 2004: 582-588 - E. Barteska, Christof Paar, Jan Pelzl, Volker Wittelsberger, Thomas J. Wollinger:
Case Study: Compiler Comparison for an Embedded Cryptographical Application. ESA/VLSI 2004: 589-595 - Suboh A. Suboh, Nikitas A. Alexandridis:
A Computational Intellegence Approach for Parametrized SoC Optimization. ESA/VLSI 2004: 596-600 - Tat Kee Tan, Anand Raghunathan, Niraj K. Jha:
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software. ESA/VLSI 2004: 601-605 - Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber:
FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. ESA/VLSI 2004: 606-610 - Kun Huang, Shivakumar Sastry:
Evaluating Communications in a Sensor-Actuator Network for Automation. ESA/VLSI 2004: 611-617 - Samir Omar, T. S. Ng:
Automated Credit Oriented System for Computer Network Administration. ESA/VLSI 2004: 618-
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