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ORCIDDASIP 2013: Cagliari, Italy
- 2013 Conference on Design and Architectures for Signal and Image Processing, Cagliari, Italy, October 8-10, 2013. IEEE 2013, ISBN 979-10-92279-01-6
- Paolo Meloni, Christophe Jégo:
Welcome to the 2013 conference on design and architectures for signal and image processing (DASIP) in Cagliari, Italy. 8
Session 1: Vision and image processing architectures.
- Bertrand Granado:
Session 1: Vision and image processing architectures. 13 - Tiago Dias, Nuno Roma, Leonel Sousa:
High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs. 14-21 - Paolo Burgio, Andrea Marongiu, Robin Danilo, Philippe Coussy, Luca Benini:
Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clusters. 22-29 - Laurent Rodriguez, Laurent Fiack, Benoît Miramond:
A neural model for hardware plasticity in artificial vision systems. 30-37 - Lars Middendorf, Christian Haubelt:
A novel graphics processor architecture based on partial stream rewriting. 38-45
Session 2: Tools for DSP algorithm implementation.
- Francesca Palumbo:
Session 2: Tools for DSP algorithm implementation. 46 - Simone Casale Brunet, Claudio Alberti, Marco Mattavelli, Jörn W. Janneck:
Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems. 47-54 - Rong Ren, Eduardo Juárez, César Sanz, Mickaël Raulet, Fernando Pescador:
System-level PMC-driven energy estimation models in RVC-CAL video codec specifications. 55-62 - Ab Al-Hadi Ab Rahman, Simone Casale Brunet, Claudio Alberti, Marco Mattavelli:
Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study. 63-70 - Johan Ersfolk, Ghislain Roquier, Johan Lilius, Marco Mattavelli:
Modeling control tokens for composition of CAL actors. 71-78
Session 3 (special session): Visual scene analysis in 2D and 3D.
- Marek Gorgon, Lionel Lacassagne:
Session 3 (special session): Visual scene analysis in 2D and 3D. 79 - Johny Paul, Walter Stechele, Manfred Kröhnert, Tamim Asfour, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat:
A resource-aware nearest-neighbor search algorithm for k-dimensional trees. 80-87 - Éricles Rodrigues Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich:
Accuracy and performance analysis of Harris Corner computation on tightly-coupled processor arrays. 88-95 - Massimo Camplani, Antonio Blasco, Daniel Berjón, Luis Salgado, Francisco Morán:
Real-time RGB-D data processing on GPU architecture. 96-103 - Andrés Romero Mier y Terán, Lionel Lacassagne, Ali Hassan Zahraee, Michèle Gouiffès:
Real-time covariance tracking algorithm for embedded systems. 104-111
Session 4 (special session): Modern localisation techniques.
- Jari Nurmi:
Session 4 (special session): Modern localisation techniques. 112 - Matti Raitoharju, Henri Nurminen, Robert Piché:
A linear state model for PDR+WLAN positioning. 113-118 - Alex G. Quinchia, Carles Ferrer, Gianluca Falco, Fabio Dovis:
Constrained non-linear fitting for stochastic modeling of inertial sensors. 119-125 - Sabrina Ugazio, Letizia Lo Presti:
Effects of colored noise in Linear Adaptive Filters applied to GNSS multipath detection. 126-133
Session 5: Image processing applications and systems.
- Sebastián López:
Session 5: Image processing applications and systems. 134 - Imane Malass, Wilfried Uhring, Jean-Pierre Le Normand, Norbert Dumas, Virginie Zint, Foudil Dadouche:
SiPM based smart pixel for photon counting integrated streak camera. 135-140 - Nicola Carta, Carlo Sau, Francesca Palumbo, Danilo Pani, Luigi Raffo:
A coarse-grained reconfigurable wavelet denoiser exploiting the Multi-Dataflow Composer tool. 141-148 - Giuseppe Tuveri, Simone Secchi, Paolo Meloni, Luigi Raffo, Emanuele Cannella:
A runtime adaptive H.264 video-decoding MPSoC platform. 149-156 - Mateusz Komorkiewicz, Marek Gorgon:
Foreground object features extraction with GLCM texture descriptor in FPGA. 157-164
Session 6: Smart and adaptive devices.
- Benoît Miramond:
Session 6: Smart and adaptive devices. 165 - Wei Tang, Forrest Brewer:
A hierarchical Ant-Colony heuristic for architecture synthesis for on-chip communication. 166-173 - Benjamin Pfundt, Marc Reichenbach, Björn M. Eskofier, Dietmar Fey:
Smart sensor architectures for embedded biosignal analysis. 174-181 - Javier Mora, Angel Gallego, Andrés Otero, Eduardo de la Torre, Teresa Riesgo:
Noise-agnostic adaptive image filtering without training references on an evolvable hardware platform. 182-189 - Syed Azhar Ali Zaidi, Muhammad Awais, Carlo Condo, Maurizio Martina, Guido Masera:
FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. 190-195
Session 7 (special session): Advanced image processing for space applications.
- Eduardo Juárez:
Session 7 (special session): Advanced image processing for space applications. 196 - Federico Francesco Barresi, Walter Allasia:
Airport markings recognition for automatic taxiing. 197-200 - Francesco Rosso, Francesco Gallo, Walter Allasia, Enrico Licata, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alain Favetto, Marco Paleari, Paolo Ariano:
Stereo vision system for capture and removal of space debris. 201-207
Session 8: 3D vision systems and applications.
- Wilfried Uhring:
Session 8: 3D vision systems and applications. 208 - Jinglin Zhang, Jean-François Nezan, Maxime Pelcat, Jean-Gabriel Cousin:
Real-time GPU-based local stereo matching method. 209-214 - Rémi Bonnard, Fabrice Guellec, Josep Segura, Antoine Dupret, Wilfried Uhring:
New 3D-integrated burst image sensor architectures with in-situ A/D conversion. 215-222 - Frank Schumacher, Thomas Greiner:
Extension and FPGA architecture of the Generalized Hough Transform for real-time stereo correspondence. 223-229
Session 9 (special session): Software defined radio.
- Julien Le Kernec, Olivier Romain:
Session 9 (special session): Software defined radio. 230 - Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya:
An efficient GPU implementation of an arbitrary resampling polyphase channelizer. 231-238 - Berend H. J. Dekens, Philip Wilmanns, Marco Jan Gerrit Bekooij, Gerard J. M. Smit:
Low-cost guaranteed-throughput communication ring for real-time streaming MPSoCs. 239-246 - Roberto Airoldi, Jari Nurmi:
Design of a matched filter for timing synchronization. 247-251
Poster Session
- Jose-Ernesto Gomez-Balderas, Dominique Houzet:
A 3D reconstruction from real-time stereoscopic images using GPU. 253-258 - Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria:
Accelerating a modified Gaussian pyramid with a customized processor. 259-264 - Quang-Hai Khuat, Daniel Chillet:
Communication cost reduction for hardware tasks placed on homogeneous reconfigurable resource. 265-270 - Yuhui Bai, Syed Zahid Ahmed, Bertrand Granado:
Design and analysis of an FPGA based encoder SoC for locally stationary image source. 271-278 - Tommi Paakki, Jussi Raasakka, Francescantonio Della Rosa, Jari Nurmi:
Efficient bit decoding implementation for mass market multi-constellation GNSS receivers. 279-283 - Jonathan Piat, David A. Marquez-Gamez, Michel Devy:
Embedded vision-based SLAM: A model-driven approach. 284-289 - Mehdi Aïchouch, Jean-Christophe Prévotet, Fabienne Nouvel:
Evaluation of an RTOS on top of a hosted virtual machine system. 290-297 - Islam Galal, Mostafa E. A. Ibrahim, Hossam E. Ahmed:
Exploring frequency tuning policies for USRP-N210 SDR platform and GNU radio. 298-303 - Jens Brandenburg, Benno Stabernack:
Memory access analysis and optimization of a parallel H.264/SVC decoder for an embedded multi-core platform. 304-311 - Yeray Hernandez, Sebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento:
A novel inter-layer intra prediction architecture for real-time SVC video codecs. 312-318 - B. G. Sileshi, Carles Ferrer, Joan Oliver:
Particle filters and resampling techniques: Importance in computational complexity analysis. 319-325 - Farouk Mansouri, Sylvain Huet, Vincent Fristot, Dominique Houzet:
Task migration of DSP application specified with a DFG and implemented with the BSP computing model on a CPU-GPU cluster. 326-333 - Michele Arcangelo Quinto, Dominique Houzet, Fanny Buyens:
Tetrahedral volume reconstruction in X-ray tomography using GPU architecture. 334-339
Demo Night
- Simone Casale Brunet, Endri Bezati, Claudio Alberti, Ghislain Roquier, Marco Mattavelli, Jörn W. Janneck, Jani Boutellier:
Design space exploration and implementation of RVC-CAL applications using the TURNUS framework. 341-342 - Christakis Lezos, Grigoris Dimitroulakos, Angeliki Freskou, Konstantinos Masselos:
Dynamic source code analysis for memory hierarchy optimization in multimedia applications. 343-344 - Philipp Wehner, Diana Göhringer:
Evaluation of driver assistance systems with a car simulator using a virtual and a real FPGA platform. 345-346 - Jan Viktorin, Pavol Korcek, Vlastimil Kosar, Jan Korenek:
Framework for fast prototyping of applications running on reconfigurable system on chip. 347-348 - Sebastian Uziel, Thomas Elste, Wolfram Kattanek, Danilo Hollosi, Stephan Gerlach, Stefan Goetze:
Networked embedded acoustic processing system for smart building applications. 349-350 - Javier Mora, Angel Gallego, Andrés Otero, Blanca López, Eduardo de la Torre, Teresa Riesgo:
A noise-agnostic self-adaptive image processing application based on evolvable hardware. 351-352 - Éricles Rodrigues Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich:
A prototype of an adaptive computer vision algorithm on MPSoC architecture. 353-354 - Andrea Congiu, Massimo Barbaro, Andrea Picciau, Emanuele Bodano, Dirk Hammerschmidt:
Prototype of a novel steady-state load identification technique for digitally controlled DC-DC power supplies. 355-356 - Prateek Murgai, Maria Trocan:
Spatial edge directed video deinterlacing. 357-358
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