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ORCIDICTA 2023: Hefei, China
- IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2023, Hefei, China, October 27-29, 2023. IEEE 2023, ISBN 979-8-3503-4428-8
- Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen:
A Bio-Impedance Measurement Chip Design with AC Current Outputs. 1-2 - Junjie Zhu, Kaiyou Li, Yanwu An, Jianping Guo:
A High-PSR High-Precision Fast-Transient-Response Capacitor-Free LDO for LiDAR Receiver SoC. 1-2 - Zicong Chen, Min Zhu, Hao Li, Yanlong Zhang:
A 250-kHz-BW 15.8-ENOB 2nd-Order Noise-Shaping SAR ADC With Multi-Path-Input Floating Inverter Amplifier. 1-2 - Yangzhi Li, Feng Wang, Yina Wei, Linqing Feng, Xinyao Tong, Zisheng Su, Tao Tang:
A 1.76 fj/Conv 1.49µW 12-Bit SAR ADC with Coarse and Fine Quantization for Implantable BCI Applications. 1-2 - Jiongzhe Su, Hao Zhang
, Hao Cai:
Temperature-Adaptive MRAM Sensing Using Varied Magneto-Resistance. 1-2 - Fei-Xiong Lu, Yi Li, Jian-Cong Li, Yi-Bai Xue, Zhiwei Zhou, Xiangshui Miao:
Energy-Efficient ReRAM-Based High-Precision Discrete Fourier Transform for Image Reconstruction. 1-2 - Wei Ling, Xue Shang, Yina Wei, Linqing Feng, Tao Tang:
A Miniaturized Flexible Optoelectronic System for Implantable Fluorescence Sensing. 1-2 - Haoyuan Gao, Hao Xu, Xinyi Lin, Yan Liu, Zhidong Tang, Xufeng Kou, Xingyu Zhang, Tetsuya Iizuka, Na Yan:
INVITED PAPER: A 4.5-5.4GHz Digital Bang-Bang PLL for Cryogenic Applications. 1-4 - Yaxi Chen, Rui Wu, Xingdong Liang:
A 16.5 mW 4.0 GHz Bandwidth VGA Based on Capacitance Neutralization Technique in 65 nm CMOS. 1-2 - Yihong Xu, Zihao Chen:
A Novel Dual-Polarized Filtering Magneto-Electric Dipole Antenna Without Extra Filtering Circuits. 1-2 - Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL. 1-2 - Qidi Li, Youze Xin, Bing Zhang, Zirui Wang, Li Geng:
A 12bit 160MS/s Pipelined SAR ADC with a MOS Self-Biased Cascoded Ring Amplifier. 1-2 - Ziyang Deng, Yun Wang, Hongtao Xu:
A CMOS Dual Band Low-Loss High-Isolation Switch for 5G New Radio. 1-2 - Xinyu Wang, Ling Li, Hao Zhang, Keping Wang:
A W-Band Low-Noise Amplifier Using Gm-Boosting Technique with Weak Coupling. 1-2 - Jielong Liu, Chang Wu, Tao Guo, Kai Wang, Chengcheng Li, An Liu, Rui Zhou, Zhen Huang, Jiayan Wu, Minhan Mi, Xiaohua Ma:
Millimeter-Wave AlGaN/GaN MIS-HEMTs with Multiple T-Gate Technology. 1-2 - Xinlin Geng, Zonglin Ye, Kailei Wang, Hongyang Zhang, Qian Xie, Zheng Wang:
A Compact Frequency Servo SoC with Background Output Power Calibration for Miniaturized Atomic Clocks. 1-2 - Tao Huang, Run Run, Yi Hu, Li Yin, Liyang Pan, Guolin Li, Xiang Xie:
An Energy-Efficient Gain-Cell Embedded DRAM Design with Weight Encoding for CNN Applications. 1-2 - Tong Wu, Lei Zhu, Yifa Wang, Jianping Guo, Dihu Chen:
A Fully Integrated High-Efficiency All-NMOS Charge Pump for Wide Input Range Ultra-Low Dropout Regulator. 1-2 - Wenming Zhu, Huixuan Yin, Yuansheng Zhao, Guoyi Yu, Yongkui Yang, Chao Wang:
A High-Linearity, Energy-Efficient Switched-Capacitor Computing Circuit for Edge Applications. 1-2 - Xinshu Xie, Jiongzhe Su, Hao Zhang, Hao Cai:
A FinFET Integrated STT-MRAM with Triple Balanced Access Strategy. 1-2 - Huanhui Zhang, Xu Yang, Zhe Wang, Shuangming Yu, Peng Feng, Jian Liu, Nanjian Wu, Runjiang Dou, Liyuan Liu:
A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC. 1-2 - Ziang Duan, Ruohan Ma, Zixuan Shen, Zhao Ge, Hao Wu, Ming Tang, Chao Wang:
INVITED PAPER: An Energy-Efficient and Reconfigurable DNN Accelerator for Optic-Fiber based Edge Sensing and Computing. 1-4 - Yulong Chen, Xiewen Wen, King-Ning Tu, Yingxia Liu:
Fast and Accurate Alignment and Bonding System Based on Advanced Packaging Technology. 1-2 - Xiang Ke, Jin Chen, Xiwei Huang, Jingjing Sun, Rikui Xiang, Siru Lin, Lingling Sun:
A Microfluidic Impedance Flow Cytometer for Highly Accurate Detection of Circulating Tumor Cells via Cellular Mechanical and Electrical Properties Sensing. 1-2 - Fuming Lei, Xu Yang, Jian Liu, Nanjian Wu, Cong Shi, Runjiang Dou, Liyuan Liu:
A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors. 1-2 - Ting Huang, Xiangyu Meng:
A Compact 2GHz LNA with Multi-Coupled Inductors for LFEM Application in 65nm CMOS. 5-8 - Fan Yang, Bowen Zhang, Leijun Song, Yuehang Xu:
C-band 60W GaN Power Amplifier MMIC with over 53% Efficiency. 11-12 - Weihao Lu, Sheng Li, Siyang Liu, Yanfeng Ma, Long Zhang, Jiaxing Wei, Weifeng Sun, Yiheng Li, Yuanyang Xia, Ke Wang, Tinggang Zhu:
Superior Performances of Dynamic On-State Resistance in 1.9kV GaN-on-Sapphire HEMT. 13-14 - Zhe Chen, Shaoheng Lin, Yonghui Lin, Tenglong Ke:
Highly Linear Receiver Analog Front-end for High-speed Optical Communication. 17-18 - Yunzhao Nie, Woogeun Rhee, Zhihua Wang:
A 405ps/20% Delay Range, 7.4mW/ns BPF-Based Delay Cell with ISI Mitigation for 7.5-8.5GHz IR-UWB Beamforming Receivers. 19-20 - Shijie Li, Ruichang Ma, Mingxing Deng, Jiamin Xue, Wei Deng, Baoyong Chi, Haikun Jia:
INVITED PAPER: A 312.5Mbps-32Gbps JESD204C Wireline Transceiver Back-Compatible with JESD204B in 28nm CMOS. 21-24 - Qiang Ma, Xiaojun Bi:
High-Efficiency Class-B/F W-Band Balanced Frequency Sixtupler in GaN HEMT Technology. 27-28 - Hui Hu, Lei Qiu, Bingbing Yao:
A Output Code Density Histograms Based Calibration Algorithm of Capacitor Mismatch for SAR ADC. 29-30 - Fengchun Tian, Xiang Fu, Haibing Wang, Jingya Zhang, Haoran Gao, Shukai Duan, Lidan Wang, Min Tian:
NORP: A Compact Neuromorphic Olfactory Recognition Processor With On-Chip Hybrid Learning. 31-32 - Zeyang Xu, Shanlin Xiao, Lingfeng Zhou, Bohan Wang, Zhiyi Yu:
Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement. 35-36 - Yanqin Zhang, Yifan Xie, Shuaidi Zhang, Lingfei Wang, Mengmeng Li, Ling Li:
Optimization of Electrical Performance of aingaZnO Thin-Film Transistors by Interfacial Modification and Passivation. 37-38 - Zihan Ning, Tong Sun, Jizhao Li, Yanfei Ren, Chenjia Xie, Li Du, Lianggong Wen, Yuan Du:
Graph Neural Network Assisted S-Parameter Inference and Control-Word Generation of Terahertz Reconfigurable Intelligent Surface. 41-42 - Jiabao Zhang, Chuting Wu, Yanhan Zeng:
A 11 mV-Undershoot PT Controlled Buck Converter with Adaptive Pulse Train Generator. 45-46 - Zhichao Du, Chuanxue Sun, Xiaoyu Dou, Pengpeng Sang, Xuepeng Zhan, Chengji Jin, Jixuan Wu, Jiezhi Chen:
Simulation for the Feasibility of IGZO Channel in 3D Vertical FeFET Memory Based on TCAD. 51-52 - Junyao Mei, Bo Chen, Pengpeng Sang, Jixuan Wu, Xuepeng Zhan, Jiezhi Chen:
Opto-Electronic Monolayer ZnO Memristor Produced via Low Temperature Atomic Layer Deposition. 53-54 - Ziyi Liu, Dixian Zhao:
A 6.9-17.0 GHz Low-noise Amplifier in 65nm CMOS. 57-58 - Wendi Chen, Dixian Zhao:
A 0/-5V High-Voltage Driver with Non-Overlapping Inverted Outputs in 65-nm CMOS Technology. 59-60 - Fan Zhang, Dixian Zhao:
A MOSFET Switch-Based Reconfigurable Transitional Butterworth-Elliptic Filter. 61-62 - You Wang, Yefan Xu, Chaoyue Zhang, Yu Gong, Hao Cai, Weiqiang Liu:
Spice-Compatible Modeling of Double Barrier MTJ for Highly Reliable Circuits. 65-66 - Haiyi Chi, Huizhe Xuan, Yang Zhang, Xian Tang:
An 800MS/s 100MHz BW Continuous-Time Pipeline ADC with Integrator-filter and Digital Reconstruction Algorithm. 67-69 - Xiangrui Wang, Dong Jiang, Yang Zhang, Hongyuan Kang, Enyi Yao:
A Genuine-Equilibrium Monte Carlo Sampling-Based Effective Algorithm for Fully-Connected Ising Models. 72-73 - Xinao Ji, Junyao Ji, Ziyu Zhou, Zhichao Dai, Xuhui Chen, Jie Zhang, Zheng Jiang, Hong Zhang:
A 16-Bit 18-MSPS SAR ADC with Hybrid Synchronous and Asynchronous Control Logic. 74-75 - Linjie Liu, Xiaohui Yuan, Yu Du, Chenxi Wang:
Sufficient Hydroxylation Surface-Activation for Low-Temperature Glass/Glass Direct Bonding. 79-80 - Guangao Wang, Qi Xiao, Haigang Feng, Jingjing Dong:
A 0.9V 1.2GHz-BW 15.8dBm-OIP3 Current Mode Analog Baseband for Broadband Receivers in 12nm FinFET CMOS. 81-82 - Jiarui Xu, Boyi Dong, Mengjie Li, Yuansheng Zhao, Yuanjin Zheng, Chao Wang:
INVITED PAPER: Challenges and Trends of Memristive IMPLY-based In-memory Computing: Efficiency, Reliability, and Compatibility Perspectives. 83-86 - Yizhi Ding, Haochang Zhi, Jintao Li, Zhuo Chen, Kaiyue Yang, Weiwei Shan:
A Compact and Robust 28nm CMOS Temperature Sensor with Machine Learning Assisted Design for DVFS SoC. 87-88 - Kexin Huang, Wei Liu, Yue Liu, Shanlin Xiao, Zhiyi Yu:
Towards Efficient On-Chip Learning for Spiking Neural Networks Accelerator with Surrogate Gradient. 89-90 - Zhouchao Gan, Dongdong Zhang, Yinghao Ma, Chenyu Zhang, Xiangshui Miao, Xingsheng Wang:
Invited Paper: A Memristor-Based Stateful Majority-Inverter Graph Logic and 1-Bit Full Adder for In-Memory Computing Systems. 95-98 - Xiaohuan Zhao, Shaoqi Yang, Kenie Xie, Yang Feng, Qianwen Wang, Pengpeng Sang, Xuepeng Zhan, Jixuan Wu, Jiezhi Chen:
Error Bits Recovering in 3D NAND Flash Memory: A Novel State-Shift Re-Program (SRP) Scheme. 99-100 - Zhihao Du, Yike Li, Chao Chen, Zheng Wang:
AttenTPU: Tensor Processor for Attention Mechanism with Fine-Grained Padding. 101-102 - Yang Chen, Binyu Cai, Changhuan Chen, Quan Sun, Xiaofei Wang, Hong Zhang:
A 1.2-mA Fast-Charge Input Buffer with CLS for 4-MS/s SC Oversampling ADC Achieving +1-2.5-ppm/FSR INL. 105-107 - Zezhi Cheng, Yabo Qin, Zongwei Wang, Feng Zou, Cuimei Wang, Yimao Cai, Ru Huang:
A High-Throughput and Configurable TRNG Based on Dual-Mode Memristor for Stochastic Computing. 108-109 - Yongkui Yang, Zhenxing Li, Chao Chen, Chao Wang:
A High Voltage Bootstrapped Switch Based SAR ADC for Battery Management System. 110-111 - Sicheng He, Yanghang Lin, Xiang Yi, Enyi Yao:
ViT - and LSTM-Based FMCW Radar Target Recognition System. 112-113 - Bochang Wang, Ziang Duan, Zixuan Shen, Yuansheng Zhao, Lu Gao, Chao Wang:
A Reconfigurable High-Precision and Energy-Efficient Circuit Design of Sigmoid, Tanh and Softmax Activation Functions. 118-119 - Guoqing Wang, Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Jian Liu, Nanjian Wu, Liyuan Liu:
A 64-Gb/s 0.33-pJ/bit PAM4 Receiver Analog Front-End with a Single-Stage Triple-Peaking CTLE Achieving 22.5-dB Boost in 40-nm CMOS Process. 120-121 - Zetao Guo, Junpeng Wang, Song Chen, Yi Kang:
A Lightweight Stereo Matching Neural Network Based on Depthwise Separable Convolution. 122-123 - Ruixuan Yang, Shuaizhe Ma, Dan Li:
Low-Power Inductor-Less Optical Receiver for 50G PON in 28nm CMOS. 124-125 - Wenqiang Huang, Yanshu Guo, Yaoyu Li, Zhihua Wang, Yuanjin Zheng, Tiefu Li, Wen Jia, Hanjun Jiang:
A 400uW 3.6GHz-4.6GHz Low Power Cryogenic CP-PLL with Transformer-Based VCO in 28nm Bulk CMOS. 126-127 - Guanavao Wang, Yuexi Lv, Yu Tian, Jian Zhang, Carol Guo, Tianshuo Bai, Biao Pan, Derek Wang, Wang Kang:
A 40nm 5-16Tops/W@INT8 eFlash In-Memory Computing SoC Chip with Noise Suppression and Compensation Techniques to Improve the Accuracy. 128-129 - Sijian Wu, Ziang Ran, Zhiguo Tong, Tianqi Liu, Yan Lu:
A Monolithic Integrated E-Mode GaN 48V-to-1V DC-DC Buck Converter with PWM Control. 130-131 - Yulong Ye, Xian Tang, Dongwang Wang, Lei Yang:
A 160nA Quiescent Current and 97.0% Peak Efficiency AOT Buck Converter With Adaptive Dead-Time Control. 132-133 - Hanwen Gong, Hu He, Bin Gao, Jianshi Tang, Qingtian Zhang, He Qian, Huaqiang Wu:
ACCLAIM: An End-to-End SystemC-AMS Simulation Framework for Analog In-Memory-Computing. 134-135 - Jipeng Chen, Luqi Yu, Rui-Jia Liu, Peng Chen, Chao Yu:
Design of An Asymmetrical Pseudo-Doherty Load-Modulated Balanced Amplifier with 15-dB Back-Off High Efficiency. 136-137 - Yukun He, Zhao Yuan, Kanan Wang, Renjie Tang, Yunxiang He, Dan Li, Li Geng, Xiaoyan Gui:
A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS. 138-139 - Junyan Sun, Xuefei Bai, Yi Kang:
An FPGA-Based Efficient NTT Accelerator for Post-Quantum Cryptography CRYSTALS-Kyber. 142-143 - Jinshan Li, Zongwei Wang, Cuimei Wang, Yimao Cai, Ru Huang:
Design Considerations of Multi-Level 1S1R Cell for In-Memory Computing. 144-145 - Zhiyue Gao, Fengwei An, Lei Chen:
A Non-Local Means Denoising Co-Processor with Data Reuse Scheme and Dual-Clock Domain for High Resolution Image Sensor. 146-147 - Shuoying Yin, Wenjie Feng, Wenquan Che, Quan Xue:
A 16MHz RC Oscillator with a Frequency Inaccuracy of 24ppm/°C from -40°C to 125°C Adopting Only Positive Temperature Coefficient Resistors. 148-149 - Qingwen Wei, Yang Zhang, Xingyu Xu, Hao Cai, Bo Liu:
An Energy-Efficient MAC Design with Error Compensation Using Hybrid Approximate Logic Synthesis. 150-151 - Chaoyang Ding, Weiyi Zhang, Cheng Nian, Yiyang Wang, Fasih Ud Din Farrukh, Chun Zhang:
A 325 FPS Corner-Detection Accelerator with Hardware-Oriented Optimization. 154-155 - Yanxian Zhou, Donghang Wang, Zerong Hu, Khawaja Qasim Maqbool, Xianbo Li:
A 120-dB Dynamic-Range, 24-ps-to-781-ps Resolution Reconfigurable Cyclic TDC Based on a 2× Time Amplifier for LiDAR Applications. 156-157 - Yifan Wang, Qi Peng, Jiyu Chen:
An FPGA-Based Low-Power Mobile-NetV2 Accelerator. 158-159 - Zhijing Wu, Qi Peng, Junlin Bao:
A Transformer-Based End-to-End Network for Unmanned Aerial Vehicle Aerial Image Object Detection. 160-161 - Yiling Xie, Baochuang Wang, Jianping Guo, Dihu Chen:
An Event-Driven Charge Pump Based OCL-LDO with 410nA IQ and 30ns Recovery Time. 162-165 - Ziliang Yin, Weiwei Shi, Kezhu Liu:
An EEG Signal Processing System Design with Approximate Operations. 166-167 - Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen:
A Fast Bioimpedance Measurement Chip Design Using Dynamic Current. 168-169 - Nannan Li, Zhengbo Huang, Jie Zhang, Quan Sun, Jian Luo, Xiaofei Wang:
A 9 b 4 GS/s Time-Domain ADC with Self-Reset VTC and Switched-RO TDC Including 8x Hybrid Interpolation. 170-171 - Yuheng Xia, Yishuo Meng, Siwei Xiang, Jianfei Wang, Chen Yang:
An Efficient Hardware Implementation of Dilated Convolution Using a Novel Channel-Equivalent Decomposition Method. 172-173 - Kai Feng, Jianjie Wang, Min Tang:
An Accurate Deep Learning-Based Thermal Reconstruction Technique for Microprocessors Using Embedded Sensors. 174-175 - Shunqin Cai, Liukai Xu, Dengfeng Wang, Zhi Li, Liang Chang, Yanan Sun:
High Energy-Efficient Approximate In-SRAM Computing with Bit-Wise Compressor Configuration and Data-Aware Weight Remapping Method for Neural Network Acceleration. 178-179 - Yongliang Xiong, Yihao Yang, Qianli Ma, Yangming Ren, Leliang Li, Guike Li, Jian Liu, Yingtao Li, Binhao Wang, Nan Qi, Liyuan Liu:
A 400-Gb/s 64-QAM Optical Receiver with Monolithically Integrated TIA and Balanced-PD in 45-nm SOI CMOS. 186-187 - Peijun Li, Weiyi Zhang, Zeyu Wan, Chun Zhang:
MSeg-SLAM: A Semantic Visual SLAM System for Dynamic Scenes. 188-189 - Shuo Feng, Fuzhan Chen, Quan Pan:
A Power-Efficient $\boldsymbol{4}-\mathbf{V}_{\mathbf{ppd}}$ 128-Gb/s PAM-4 Optical Modulator Driver with Merged BV Doubler Topology in 130-nm BiCMOS. 190-191 - Dongshen Zhan, Liping Zhong, Wentao Zhou, Zhenyu Yao, Xiongshi Luo, Yangyi Zhang, Hemiao Wang, De Zhou, Quan Pan:
A 28-Gb/s PAM-4 Fully-Integrated Optical Receiver with High-Speed Silicon Photodetector in 28-nm CMOS. 192-193 - Lifan Ma, Jun Wang:
Experiments and Hygrothermal Stress Analysis for a QFN Package. 194-195 - Bingfang Xu, Henghui Wang, Wenzheng Lin, Sheng Sun:
Multiple-Transmission Zeros Bandstop Filter Based on SAW Resonators and Lumped Elements. 196-197 - Giovanni De Micheli:
Cyclical Progress in Design and Technology. 202-203
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