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ORCIDISCAS 2003: Bangkok, Thailand - Volume 1
- Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003. IEEE 2003, ISBN 0-7803-7761-3
- Yi-Ran Sun, Svante Signell:
Algorithms for nonuniform bandpass sampling in radio receiver. 1-4 - Aránzazu Otín
, Santiago Celma, Concepción Aldea:
Modeling of accumulation MOS capacitors for high performance analog circuits. 5-8 - Ganesh Kathiresan, Emmanuel M. Drakakis, Chris Toumazou:
A highly linear front-end based on a logarithmic multiplier-filter. 9-12 - Antonio J. López-Martín, Alfonso Carlosena, Jaime Ramírez-Angulo:
A novel design technique for very low voltage MOS translinear circuits. 13-16 - André van Schaik:
A small analog VLSI inner hair cell model. 17-20 - Kai-Sheng Lu:
Some structural conditions under which an RLC network is controllable over F(z). 21-24 - Philipp Häfliger, Håvard Kolle Riis:
A multi-level static memory cell. 25-28 - Sung-Eun Kim, Seong-Jun Song, Sung Min Park, Hoi-Jun Yoo:
CMOS optical receiver chipset for gigabit Ethernet applications. 29-32 - Esa Tiiliharju, Kari Halonen:
A biased low-voltage BiCMOS mixer for direct up-conversion. 33-36 - Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao:
A high-resolution and fast-conversion time-to-digital converter. 37-40 - Surachet Khucharoensin, Varakorn Kasemsuwan:
High performance CMOS current-mode precision full-wave rectifier (PFWR). 41-44 - Bo Shi, Lars Sundström:
A time-continuous optimization method for automatic adjustment of gain and phase imbalances in feedforward and LINC transmitters. 45-48 - Guangyu Zhang, Pruthvi (Peter) Chaudhari, Michael M. Green:
A BiCMOS 10Gb/s adaptive cable equalizer. 49-52 - Erik Säll:
A 1.8 V 10-bit 80 MS/s low power track-and-hold circuit in a 0.18µm CMOS process. 53-56 - Nikolaos Nastos, Yannis Papananos:
Integrated inductors over MOSFETs - experimental results of a three dimensional integrated structure. 57-60 - J. Shorb, Xiaoyong Li, David J. Allstot:
A resonant pad for ESD protected narrowband CMOS RF applications. 61-64 - Mohamed Lamine Tounsi, H. Halheit, Mustapha Chérif-Eddine Yagoub, Abdfelhamid Khodja:
Analysis of shielded planar circuits by a mixed variational-spectral method. 65-68 - Alyssa B. Apsel, Andreas G. Andreou:
A 7 milliwatt 1GBPS CMOS optical receiver for through wafer communication. 69-72 - Chin-Shan Hsieh, Hong-Yi Huang, Jeng-Dang Juan, Ruey-Nan Yeh:
A high-bandwidth wireless infrared receiver with feedforward offset extractor. 73-76 - Alyssa B. Apsel, Andreas G. Andreou:
A 10 milliwatt 2 Gbps CMOS optical receiver for optoelectronic interconnect. 77-80 - Elisabetta Chicca, Giacomo Indiveri, Rodney J. Douglas:
An adaptive silicon synapse. 81-84 - Matthias Frey, Hans-Andrea Loeliger, Felix Lustenberger, Patrick R. Merkli, Patrik Strebel:
Analog-decoder experiments with subthreshold CMOS soft-gates. 85-88 - Srinivas Kodali, David J. Allstot:
A symmetric miniature 3D inductor. 89-92 - Srinivas Kodali, Taeik Kim, David J. Allstot:
On-chip inductor structures: a comparative study. 93-96 - Janusz Biernacki, Dariusz Czarkowski:
RF transformer as a directional coupler with arbitrary load. 97-100 - Clarence K. L. Tam, Gordon W. Roberts:
A DC current measurement circuit for on-chip applications. 101-104 - Atsushi Suzuki, Shoji Kawahito, Daisuke Miyazaki, Masanori Furuta:
A digitally skew correctable multi-phase clock generator using a master-slave DLL. 105-108 - Jaeki Yoo, Edward Lee, Earl E. Swartzlander Jr.:
A self-testing method for the pipelined A/D converter. 109-112 - Igor M. Filanovsky, P. N. Matkhanov:
Synthesis of a pulse-forming reactance network to shape a delayed quasi-rectangular pulse. 113-116 - Jofre Pallares, Justo Sabadell, Francisco Serra-Graells:
Modeling all-MOS log filters and its application to Sigma-Delta modulators. 117-120 - Sandro A. P. Haddad, Richard Houben, Wouter A. Serdijn:
Analog wavelet transform employing dynamic translinear circuits for cardiac signal characterization. 121-124 - Øivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande:
A low voltage second order biquad using pseudo floating-gate transistors. 125-128 - Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca:
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output. 129-132 - Nuno F. Paulino, M. Serrazina, João Goes, Adolfo Steiger-Garção:
Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver. 133-136 - Cheuk-Yiu Ng, Mitchai Chongcheawchamnan, Ian D. Robertson, K. Cho:
Resistive FET IQ vector modulator using multilayer photoimageable thick-film technology. 137-140 - Surachet Khucharoensin, Varakorn Kasemsuwan:
High-speed low input impedance CMOS current comparator. 141-144 - Guiomar Evans, João Goes, Adolfo Steiger-Garção, Manuel Duarte Ortigueira, Nuno F. Paulino, Jilseph Lopes Silva:
Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. 145-148 - Dusan M. Milosevic, Johan van der Tang, Arthur H. M. van Roermund:
On the feasibility of application of class E RF power amplifiers in UMTS. 149-152 - Gianluca Giustolisi, Gaetano Palumbo:
A novel 1-V class-AB transconductor for improving speed performance in SC applications. 153-156 - Juana Maria Martinez-Heredia, Antonio Jesús Torralba Silgado, Ramón González Carvajal, Jaime Ramírez-Angulo:
A new 1.5V linear transconductor with high output impedance in a large bandwidth. 157-160 - Adrian Leuciuc:
A wide linear range low-voltage transconductor. 161-164 - Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín:
Constant-gm constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries. 165-168 - Timothy G. Constandinou, Julius Georgiou, Chris Toumazou:
An auto-input-offset removing floating gate pseudo-differential transconductor. 169-172 - Stephan Shang, Shahriar Mirabbasi, Resve A. Saleh:
A technique for DC-offset removal and carrier phase error compensation in integrated wireless receivers. 173-176 - Liwei Sheng, Lawrence E. Larson:
A general theory of third-order intermodulation distortion in common-emitter radio frequency circuits. 177-180 - Antônio Carlos M. de Queiroz:
Capacitively coupled multiple resonance networks. 181-184 - Kyoung-Hoi Koo, Jin-Ho Seo, Jae-Whui Kim:
Digitally tuneable on-chip resistor in CMOS for high-speed data transmission. 185-188 - Alfredo Arnaud, Carlos Galup-Montoro:
Simple noise formulas for MOS analog design. 189-192 - Esteban Tlelo-Cuautle, Alejandro Díaz-Sánchez:
An heuristic circuit-generation technique for the design-automation of analog circuits. 193-196 - Rui Manuel Tavares, Bruno Vaz, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção:
Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance. 197-200 - Alan A. Stocker:
Compact integrated transconductance amplifier circuit for temporal differentiation. 201-204 - S. Sridharan, Ghanshyam Nayak, P. R. Mukund:
LNA design optimization with reference to ESD protection circuitry. 205-208 - Byunghoo Jung, Anand Gopinath, Ramesh Harjani:
A novel noise optimization design technique for radio frequency low noise amplifiers. 209-212 - Giovanni Girlando, Egidio Ragonese, Alessandro Italia, Giuseppe Palmisano:
Bipolar LNA design at different operating frequencies. 213-216 - Tommy Kwong-Kin Tsang, Mourad N. El-Gamal:
Dual-band sub-1 V CMOS LNA for 802.11a/b WLAN applications. 217-220 - Jongrit Lerdworatawee, Won Namgoong:
Low noise amplifier design for ultra-wideband radio. 221-224 - Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo:
A 1-V CMOS output stage with high linearity. 225-228 - Chih-Wen Lu:
A new rail-to-rail driving scheme and a low-power high-speed output buffer amplifier for AMLCD column driver application. 229-232 - Gianluca Giustolisi, Gaetano Palumbo:
A new method for evaluating harmonic distortion in push-pull output stages. 233-236 - Antonio Jesús Torralba Silgado, Ramón González Carvajal, Juan Antonio Gómez Galán, Jaime Ramírez-Angulo:
A new compact low-power high slew rate class AB CMOS buffer. 237-240 - Joseph S. Shor, Yan Polansky, Yaen Yaacov Sofer, Eduardo Maayan:
Self-regulated four-phased charge pump with boosted wells. 241-244 - Chih-Lung Hsiao, Ro-Min Weng, Kun-Yi Lin:
A 1V fully differential CMOS LNA for 2.4GHz application. 245-248 - Ahmet Aksen, B. Siddik Yarman:
A parametric approach to describe distributed two-ports with lumped discontinuities for the design of broadband MMICs. 249-252 - Hyeon-Min Bae, Naresh R. Shanbhag:
High bandwidth transimpedance amplifier design using active transmission lines. 253-256 - Gang Xu, Jiren Yuan:
A Differential Difference Comparator for multi-step A/D converters. 257-260 - Enno Karel De Lange, Oscar De Feo, Arie van Staveren:
Modelling differential pairs for low-distortion amplifier design. 261-264 - Haibin Huang, Ezz I. El-Masry:
A fast settling CMOS operational amplifier. 265-268 - Antonio Jesús Torralba Silgado, Ramón González Carvajal, Fernando Muñoz, Jaime Ramírez-Angulo:
New output stage for low supply voltage, high-performance CMOS current mirrors. 269-272 - Saeid Mehrmanesh, Hesam Amir Aslanzadeh, Mohammad B. Vahidfar, Seyed Mojtaba Atarodi:
A 1.5 v high-speed class AB operational amplifier for high-resolution high-speed pipelined A/D converters. 273-276 - Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín:
1-V quasi constant-gm input/output rail-to-rail CMOS op-amp. 277-280 - Sohrab Samadian, Ryoji Hayashi, Asad A. Abidi:
Low power demodulators with phase quantization for a zero-IF Bluetooth receiver. 281-284 - Sungho Beck, Myung-woon Hwang, Sang-Hoon Lee, Gyu-Hyeong Cho, Jong-Ryul Lee:
A precise temperature-insensitive and linear-in-dB variable gain amplifier. 285-288 - Francesco Carrara, Pietro Filoramo, Giuseppe Palmisano:
High-dynamic-range decibel-linear IF variable-gain amplifier with temperature compensation for WCDMA applications. 289-292 - Ertan Zencir, Numan Sadi Dogan, Ercument Arvas, Mohammed Ketel:
A low-power low-noise amplifier in 0.35µm SOI CMOS technology. 293-296 - Ming-Dou Ker, Chien-Ming Lee:
Interference of ESD protection diodes on RF performance in Giga-Hz RF circuits. 297-300 - Eugenio Culurciello, Andreas G. Andreou:
An 8-bit, 1mW successive approximation ADC in SOI CMOS. 301-304 - Henrique Costa de Moura Santos, Ana Isabela Araújo Cunha:
Application of ACM model to the design of CMOS OTA through a graphical approach. 305-308 - Dirk Weiler, Ton J. J. van den Boom, Bedrich J. Hosticka:
Resolution prediction for bandpass-Sigma-Delta-modulators using SIMULINK behavior simulation. 309-312 - Rami F. Salem, Mohamed S. Tawfik, Hani F. Ragaie:
A symmetric quadrature-less image rejection architecture for RF receivers. 313-316 - Jihua Zheng, Yongming Li, Hongyi Chen:
A low-power low-noise 600MHz CMOS IF demodulator for superheterodyne receivers. 317-320 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
Matching of low-noise amplifiers at high frequencies. 321-324 - Zhan Xu, Ezz I. El-Masry:
Design and optimization of CMOS class-E power amplifier. 325-328 - Ming-Chang Sun, Shing Tenqchen, Ying-Haw Shu, Wu-Shiung Feng:
A 2.4 GHz CMOS image-reject low noise amplifier. 329-332 - Paolo Crippa, Simone Orcioni, F. Ricciardi, Claudio Turchetti:
Design of a 4.4 to 5 GHz LNA in 0.25µm SiGe BiCMOS technology. 333-336 - Joon-Jea Sung, Guen-Soon Kang, Suki Kim:
A CMOS infrared optical signal processor for remote control. 337-340 - Bendong Sun, Fei Yuan:
A new differential CMOS current pre-amplifier for optical communications. 341-344 - Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin:
Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. 345-348 - Khanittha Kaewdang, Chalermpan Fongsamut, Wanlop Surakampontorn:
A wide-band current-mode OTA-based analog multiplier-divider. 349-352 - Chengming He, Degang Chen, Randall L. Geiger:
A low-voltage compatible two-stage amplifier with ≥120 dB gain in standard digital CMOS. 353-356 - Alessandro Savio, Anna Richelli, Luigi Colalongo, Zsolt Miklós Kovács-Vajna:
A fully-integrated self-tuned transformer based step-up converter. 357-360 - Uday Dasgupta, Yong Ping Xu:
Effects of resistive loading on unity gain frequency of two-stage CMOS operational amplifiers. 361-364 - Jozef Adut, José Silva-Martínez:
Cascode transconductance amplifiers for HF switched-capacitor applications. 365-368 - Janusz Zarebski, Krzysztof Górecki:
The electrothermal model of the linear power supplies. 369-372 - Yamu Hu, Mohumud Sowan:
A 900 mV 25µW high PSRR CMOS voltage reference dedicated to implantable micro-devices. 373-376 - A. Pretelli, Anna Richelli, Luigi Colalongo, Zsolt Miklós Kovács-Vajna:
Increasing the immunity to electromagnetic interferences in a bandgap voltage reference. 377-380 - Saeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi:
A 1-volt, high PSRR, CMOS bandgap voltage reference. 381-384 - Soliman A. Mahmoud, Inas A. Awad:
New CMOS balanced output transconductor and application to GM-C biquad filter. 385-388 - Igor M. Filanovsky:
One class of transfer functions with monotonic step response. 389-392 - Carlos Sánchez-López, Alejandro Díaz-Sánchez, Esteban Tlelo-Cuautle:
Analog implementation of MOS-translinear Morlet Wavelets. 393-396 - Tsung-Sum Lee, Chi-Chang Lu:
A fully differential low-voltage CMOS high-speed track-and-hold circuit. 397-400 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
Adaptivity figures of merit and K-rail diagrams - comprehensive performance characterization of low-noise amplifiers and voltage-controlled oscillators. 401-404 - Boonchai Boonchu, Wanlop Surakampontorn:
A CMOS current-mode squarer/rectifier circuit. 405-408 - Miguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre:
Broad-band transimpedance amplifier for multigigabit-per-second (40 Gbps) optical communication systems in 0.135µm PHEMT technology. 409-412 - Nikos Naskas, Yannis Papananos:
A new non-iterative, adaptive baseband predistortion method for high power rf amplifiers. 413-416 - Te-Hsin Huang, Ertan Zencir, Mehmet R. Yuce, Numan Sadi Dogan, Wentai Liu, Ercument Arvas:
A 22-mW 435 MHz silicon on insulator CMOS high-gain LNA for subsampling receivers. 417-420 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
Concept of transformer-feedback degeneration of low-noise amplifiers. 421-424 - Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi:
A high compliance CMOS current source for low voltage applications. 425-428 - Christian Falconi, Arnaldo D'Amico, Marco Faccio:
Design of accurate analog circuits for low voltage low power CMOS systems. 429-432 - K. Moolpho, Jitkasem Ngarmnil, Suchada Sitjongsataporn:
A high speed low input current low voltage CMOS current comparator. 433-436 - N. Srirattana, Muhammad Shakeel Qureshi, A. Aude, V. Krishnamurthy, Deuk Hyoun Heo, Phillip E. Allen, Joy Laskar:
SiGe HBT power amplifier for IS-95 CDMA using a novel process, voltage, and temperature insensitive biasing scheme. 437-440 - Eric Kerherve, Mathieu Hazouard, Laurent Courcelle, Pierre Jarry:
Large-signal S-parameters CAD technique applied to power amplifier design. 441-444 - C. Tongchoi, Mitchai Chongcheawchamnan, Apisak Worapishet:
Lumped element based Doherty power amplifier topology in CMOS process. 445-448 - Tang Tat Hung, Mourad N. El-Gamal:
Class-E CMOS power amplifiers for RF applications. 449-452 - Yorgos Palaskas, Yannis P. Tsividis:
Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters. 453-456 - Jaeyoung Shin, Sunki Min, Soosun Kim, Joongho Choi, Soohyoung Lee, Hojin Park, Jaewhui Kim:
3.3-V baseband Gm-C filters for wireless transceiver applications. 457-460 - Chun-Ming Chang, Bashir M. Al-Hashimi:
Analytical synthesis of voltage mode OTA-C all-pass filters for high frequency operation. 461-464 - Shahram Minaei, Oguzhan Cicekoglu:
A new resistorless electronically tunable voltage-mode first-order phase equalizer. 465-468 - Drazen Jurisic, George S. Moschytz, Neven Mijat:
Low-noise low-power allpole active-RC filters minimizing resistor level. 469-472 - Deepa S. Parthasarathy, Ramesh Harjani:
Novel integratable notch filter implementation for 100 dB image rejection. 473-476 - Eduardo Rapoport, Fernando Antonio Pinto Barúqui, Antonio Petraglia:
Tunable analog loudspeaker crossover network. 477-480 - Jen-Shiun Chiang, Hsueh-Ping Chen, Cheng-Ming Ying:
A 1V 0.54µW fourth order switched capacitor filter with switched opamp technique for cardiac pacemaker sensing channel. 481-484 - C. Frost, G. Levy, B. Allison:
A CMOS 2 MHz self-calibrating bandpass filter for personal area networks. 485-488 - Ahmed Emira, Edgar Sánchez-Sinencio:
A low-power CMOS complex filter for Bluetooth with frequency tuning. 489-492 - Stefano D'Amico, Andrea Baschirotto:
0.18µ CMOS Gm-C digitally tuned filter for telecom receivers. 493-496 - P. Sirinamaratana, N. Wongkomet:
A 0.7µm CMOS anti-aliasing filter for non-oversampled video signal applications. 497-500 - Armin Tajalli, Seyed Mojtaba Atarodi:
A compact biquadratic gm-C filter structure for low-voltage and high frequency applications. 501-504 - Masayuki Kawamata:
On the invariance of the second-order modes of continuous-time systems under general frequency transformation [analog filters]. 505-508 - Roman Kaszynski:
Properties of analog systems with varying parameters [averaging/low-pass filters]. 509-512 - Behrouz Nowrouzian, Arthur T. G. Fuller:
A novel approach to the design and synthesis of general-order Bode-type variable-amplitude active-RC equalizers. 513-516 - Zhenying Luo, Ming Fu Li, Yong Lian, Subhash Chander Rustagi:
CMOS transconductor design for VHF filtering applications. 517-520 - Armin Tajalli, Seyed Mojtaba Atarodi:
Design considerations for a 1.5-V, 10.7-MHz bandpass gm-C filter in a 0.6µm standard CMOS technology. 521-524 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
Performance comparison of Tow-Thomas biquad filters based on VOAs and CFOAs. 525-528 - P. Tangtisanon, A. Khempila, N. Panyanouvong, S. Saetia, K. Janchitrapongvej, S. Sudo, M. Teramoto:
The design of an active band pass filter using uniformly distributed RC line. 529-532 - Brent Maundy, Ezz I. El-Masry, Peter B. Aronhime:
Novel high performance single amplifier biquads [voltage mode filters]. 533-536 - Kazuyuki Wada, Yoshiaki Tadokoro:
RC polyphase filter with flat gain characteristic. 537-540 - Amorn Jiraseree-amornkun, Nobuo Fujii, Wanlop Surakampontorn:
Realization of electronically tunable ladder filters using multi-output current controlled conveyors. 541-544 - Mykhaylo A. Teplechuk, John I. Sewell:
Log-domain complex filter design with XFILTER. 545-548 - H. J. Ko, Robert M. Fox:
Comparison of currents in differential log-domain filters with common-mode feedback. 549-552 - Jirayuth Mahattanakul, Y. Piputtawutchai:
Fully-differential log-domain integrator with orthogonal common-mode and differential-mode responses. 553-556 - Belén Calvo, Maria Teresa Sanz, Santiago Celma, Pedro A. Martínez:
A CMOS digitally tunable transconductor for video frequency operation. 557-560 - Saeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi:
An ultra low-voltage Gm-C filter for video applications. 561-564 - Andrea Maniero, Andrea Gerosa, Andrea Neviani:
Performance optimization in micro-power, low-voltage log-domain filters in pure CMOS technology. 565-568 - André van Schaik, Craig T. Jin:
The tau-cell: a new method for the implementation of arbitrary differential equations. 569-572 - Apinunt Thanachayanont, S. Sae-Ngow:
Inductorless RF amplifier with tuneable band-selection and image rejection. 573-576 - H. Ahmed, Chris DeVries, Ralph Mason:
RF, Q-enhanced bandpass filters in standard 0.18µm CMOS with direct digital tuning. 577-580 - Wiset Saksiri, Monai Krairiksh:
Lumped element model approach for the bandwidth enhancement of coupled microstrip antenna. 581-584 - Vinita Vasudevan:
A time-domain technique for computation of noise spectral density in switched capacitor circuits. 585-588 - Ramón González Carvajal, Juan Antonio Gómez Galán, Jaime Ramírez-Angulo, Antonio Jesús Torralba Silgado:
New low-power low-voltage differential class-AB OTA for SC circuits. 589-592 - Gerry Quilligan, D. P. Burton:
A 0.35µm CMOS voltage derivative sensor with sign and inflection outputs. 593-596 - José L. Ausín, Miguel Angel Domínguez, J. Francisco Duque-Carrillo, Guido Torelli:
Noise-shaping modulation in high-Q SC filters. 597-600 - José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Jorge Sánchez Valverde:
Non-uniform sampling SC circuits based on noise-shaping feedback coding. 601-604 - Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo:
Design of low-voltage low-power SC filters for high-frequency applications. 605-608 - Inchang Seo, Robert M. Fox:
Low-power switched-capacitor filters using charge transfer integrators. 609-612 - Shuenn-Yuh Lee, Yueh-Lun Tsai, Wei-Zen Su, Po-Hui Yang:
A 2.5 V switched-current sigma-delta modulator with a novel class AB memory cell. 613-616 - Kasin Vichienchom, Wentai Liu:
Analysis of phase noise due to bang-bang phase detector in PLL-based clock and data recovery circuits. 617-620 - Alistair McEwan, Steve Collins:
Analogue interpolation based direct digital frequency synthesis. 621-624 - Charan Meenakarn, Apinunt Thanachayanont:
A sine-output ROM-less direct digital frequency synthesiser using a polynomial approximation. 625-628 - Uroschanit Yodprasit, Christian C. Enz:
Nonlinear analysis of a Colpitts injection-locked frequency divider. 629-632 - Wen-Chi Wu, Chih-Chien Huang, Chih-Hsiung Chang, Nai-Heng Tseng:
Low-power CMOS PLL for clock generator. 633-636 - Marc Tiebout:
Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz. 637-640 - Tser-Yu Lin, Ying-Zong Juang, Hung-Yu Wang, Chin-Fong Chiu:
A low power 2.2-2.6GHz CMOS VCO with a symmetrical spiral inductor. 641-644 - Lixin Yang, Jiren Yuan:
An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average. 645-648 - Kee-Chee Tiew, J. Cusey, Randall L. Geiger:
Inflection point correction for voltage references. 649-652 - Thilak Senanayake, Tamotsu Ninomiya:
High-current clamp for fast-response load transitions of DC-DC converter. 653-656 - Rola A. Baki, Mourad N. El-Gamal:
A new CMOS charge pump for low-voltage (1V) high-speed PLL applications. 657-660 - Xiaoyan Wang, Pietro Andreani:
Impact of mutual inductance and parasitic capacitance on the phase-error performance of CMOS quadrature VCOs. 661-664 - Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown:
Study and simulation of CMOS LC oscillator phase noise and jitter. 665-668 - Jing-Hong Conan Zhan, Kyle Maurice, Jon S. Duster, Kevin T. Kornegay:
Analysis of emitter degenerated LC oscillators using bipolar technologies. 669-672 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
Low-noise biasing of voltage-controlled oscillators by means of resonant inductive degeneration. 673-676 - Juan Antonio Gómez Galán, Ramón González Carvajal, Fernando Muñoz, Antonio Jesús Torralba Silgado, Jaime Ramírez-Angulo:
A low-power low-voltage OTA-C sinusoidal oscillator with more than two decades of linear tuning range. 677-680 - Wim Michielsen, Li-Rong Zheng, Hannu Tenhunen:
Analysis and design of a double tuned Clapp oscillator for multi-band multi-standard radio. 681-684 - Tony Pialis, Khoman Phang:
Analysis of timing jitter in ring oscillators due to power supply noise. 685-688 - Luís Bica Oliveira, Jorge R. Fernandes, Michiel H. L. Kouwenhoven, Chris van den Bos, Chris J. M. Verhoeven:
A quadrature relaxation oscillator-mixer in CMOS. 689-692 - Krishnakumar Sundaresan, Keith C. Brouse, Kongpop U-Yen, Farrokh Ayazi, Phillip E. Allen:
A 7-MHz process, temperature and supply compensated clock oscillator in 0.25µm CMOS. 693-696 - M. Jamal Deen, Mehdi H. Kazemeini, Susan Nuseh:
Performance characteristics of an ultra-low power VCO. 697-700 - Mehdi H. Kazemeini, M. Jamal Deen, Susan Nuseh:
Phase noise in a back-gate biased low-voltage VCO. 701-704 - Xibo Zhang, Philip K. T. Mok, Mansun Chan, Ping K. Ko:
Large-signal and phase noise performance analysis of active inductor tunable oscillators. 705-708 - Robert Charles Koons, John R. Long:
An inductively-tuned quadrature oscillator with extended frequency control range. 709-712 - Sawat Bunnjaweht, M. J. Underhill, Ian D. Robertson:
Sideband noise reduction in transposed gain oscillators. 713-716 - Chao Su, Sreenath Thoka, Kee-Chee Tiew, Randall L. Geiger:
A 40 GHz modified-Colpitts voltage controlled oscillator with increased tuning range. 717-720 - Syed Irfan Ahmed, Ralph D. Mason:
A dual edge-triggered phase-frequency detector architecture. 721-724 - Darius Jakonis, Christer Svensson:
A 1.6 GHz downconversion sampling mixer in CMOS. 725-728 - Omid Oliaei:
Extraction of timing jitter from phase noise. 729-732 - Joohwan Park, Franco Maloberti:
Phase noise improvement in fractional-N synthesizer with 90° phase shift lock. 733-736 - Sami Karvonen, Thomas A. D. Riley, Juha Kostamovaara:
On the effects of timing jitter in charge sampling. 737-740 - Haigang Feng, Rouying Zhan, Guang Chen, Qiong Wu, Xiaokang Guan, Haolu Xie, Albert Z. Wang:
Bonding-pad-oriented on-chip ESD protection structures for ICs. 741-744 - Gang Xu, Jiren Yuan:
Performance analysis of general charge sampling. 745-748 - Xiaofeng Lin, Guangbin Zhang, Jin Liu:
Pulse extraction: a digital power spectrum estimation method for adaptation of Gbps equalizers. 749-752 - Ken Yamamoto, Minoru Fujishima, Koichiro Hoh:
Optimization of shield structures in analog integrated circuits. 753-756 - Young-Mi Lee, Ju-Sang Lee, Sang Jin Lee, Ri-A Ju:
Design of a frequency synthesizer for WCDMA in 0.18µm CMOS process. 757-760 - Li Yang, J. S. Yuan:
Design of enhancement current-balanced logic for mixed-signal ICs. 761-764 - Phaophak Sirisuk, Apisak Worapishet, Saifon Tanoi:
An efficient mixed-signal architecture for minimum output energy blind multiuser detection. 765-768 - Roman Genov, Gert Cauwenberghs:
Algorithmic partial analog-to-digital conversion in mixed-signal array processors. 769-772 - Eric E. Fabris, Luigi Carro, Sergio Bampi:
An analog signal interface with constant performance for SoCs. 773-776 - Milutin Stanacevic, Gert Cauwenberghs:
Mixed-signal gradient flow bearing estimation. 777-780 - Jaime Ramírez-Angulo, Carlos Urquidi, Ramón González Carvajal, Antonio Jesús Torralba Silgado:
Sub-volt supply analog circuits based on quasi-floating gate transistors. 781-784 - Jouko Vankka, Jonne Lindeberg, Kari Halonen:
Direct digital synthesizer with tunable phase and amplitude error feedback structures. 785-788 - Subhash Chander Rustagi, Chun-Geik Tan:
Equivalent circuit models for stacked spiral inductors in deep submicron CMOS technology. 789-792 - Chunyan Wang, M. Omair Ahmad, M. N. S. Swamy:
A CMOS current-controlled oscillator and its applications. 793-796 - Hyung Ki Ahn, In-Cheol Park, Beomsup Kim:
A 5-GHz self-calibrated I/Q clock generator using a quadrature LC-VCO. 797-800 - Antonio J. López-Martín, Jaime Ramírez-Angulo, Ramón González Carvajal:
Low-voltage low-power wideband CMOS current conveyors based on the flipped voltage follower. 801-804 - Jaime Ramírez-Angulo, Ramón González Carvajal, Gladys Omayra Ducoudray:
New very compact CMOS continuous-time low-voltage analog rank-order filter architecture. 805-808 - Yu-Chuan Shih, Chung-Yu Wu:
An optimized CMOS pseudo-active-pixel-sensor structure for low-dark-current imager applications. 809-812 - Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal, Chad Lackey:
Low-voltage closed-loop amplifier circuits based on quasi-floating gate transistors. 813-816 - Fernando Muñoz, Antonio J. López-Martín, Ramón González Carvajal, Jaime Ramírez-Angulo, Antonio Jesús Torralba Silgado, Meghraj Kachare, Bernardo Palomo Vázquez:
Extremely low supply voltage circuits based on quasi-floating gate supply voltage boosting. 817-820 - Tsung-Sum Lee, Li-Dyi Luo, Chin-Sheng Lin:
Design techniques for a fully differential low voltage low-power flash analog to-digital converter. 821-824 - Väinö Hakkarainen, Lauri Sumanen, Mikko Aho, Mikko Waltari, Kari Halonen:
A self-calibration technique for time-interleaved pipeline ADCs. 825-828 - Jipeng Li, Un-Ku Moon:
An extended radix-based digital calibration technique for multi-stage ADC. 829-832 - Kamal El-Sankary, Ali Assi, Mohamad Sawan:
New sampling method to improve the SFDR of time-interleaved ADCs. 833-836 - Miquel Albiol, José Luis González, Eduard Alarcón:
Improved current-source sizing for high-speed high-accuracy current steering D/A converters. 837-840 - Zeynep Toprak Deniz, Yusuf Leblebici:
Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology. 841-844 - Liviu Chiaburu, Svante Signell:
A method to reduce power consumption in pipelined A/D converters. 845-848 - Pedro M. Figueiredo, João C. Vital:
Analysis of the averaging technique in flash ADCs. 849-852 - D. R. Beck, David J. Allstot, D. Garrity:
An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps. 853-856 - Guillaume Ding, Catherine Dehollain, Michel J. Declercq, Kamran Azadet:
Frequency-interleaving technique for high-speed A/D conversion. 857-860 - Susan Luschas, Hae-Seung Lee:
Output impedance requirements for DACs. 861-864 - Liviu Chiaburu, Svante Signell:
An improved binary algorithmic A/D converter architecture. 865-868 - Hyuen-Hee Bae, Jin-Sik Yoon, Myung-Jin Lee, Eun-Seok Shin, Seung-Hoon Lee:
A 3 V 12b 100 MS/s CMOS D/A converter for high-speed system applications. 869-872 - Waisiu Law, Jianjun Guo, Charles T. Peach, Ward J. Helms, David J. Allstot:
A monotonic digital calibration technique for pipelined data converters. 873-876 - M. Unterweissacher, João Goes, Nuno F. Paulino, Guiomar Evans, Manuel Duarte Ortigueira:
Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise. 877-880 - Hung-Chih Liu, Zwei-Mei Lee, Jieh-Tsorng Wu:
A digital background calibration technique for pipelined analog-to-digital converters. 881-884 - Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Seyed Mojtaba Atarodi:
A 1.8-v high-speed 13-bit pipelined analog to digital converter for digital IF applications. 885-888 - Jianjun Guo, Waisiu Law, Charles T. Peach, Ward J. Helms, David J. Allstot:
A mixed-signal calibration technique for low-voltage CMOS 1.5-bit/stage pipeline data converters. 889-892 - Farhang Vessal, C. André T. Salama:
An 8-bit 2-GSample/s analog-to-digital converter in 0.5µm SiGe technology. 893-896 - Kamran Farzan, David A. Johns:
A power-efficient architecture for high-speed D/A converters. 897-900 - Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang:
1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. 901-904 - C. Sim, Chris Toumazou:
Power efficient scalable precision rational digital to analogue converters. 905-908 - Zhongjun Yu, Degang Chen, Randall L. Geiger:
1-D and 2-D switching strategies achieving near optimal INL for thermometer-coded current steering DACs. 909-912 - Chiheb Rebai, Dominique Dallet, Philippe Marchegay:
High order 1-bit digital sigma delta modulation for on chip analogue signal sources. 913-916 - Jouko Vankka, Jonne Lindeberg, Kari Halonen:
Direct digital synthesizer with tunable delta sigma modulator. 917-920 - Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli:
A 1 V, 12-bit wideband continuous-time ΣΔ modulator for UMTS applications. 921-924 - Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli:
Influence of finite integrator gain bandwidth on continuous-time sigma delta modulators. 925-928 - Denis Daly, Anthony Chan Carusone:
A sigma-delta based open-loop frequency modulator. 929-932 - Lei Wang, Sherif H. K. Embabi:
Low voltage 2-path SC bandpass ΔΣ modulator without bootstrapper. 933-936 - Zhenghong Wang, Xieting Ling, Bo Hu:
A low-complexity low-distortion topology for wideband delta-sigma ADCs. 937-940 - Minho Kwon, Jungyoon Lee, Gunhee Han:
A time-interleaved switched-capacitor band-pass delta-sigma modulator. 941-944 - Mitsuhiko Yagyu:
Design of noise shaping FIR filters by minimizing in-band peak amplitude for stable single- and multi-bit data converters. 945-948 - R. T. Silva, Jorge R. Fernandes:
A low-power CMOS folding and interpolation A/D converter with error correction. 949-952 - Vincenzo Ferragina, Andrea Fornasari, Umberto Gatti, Piero Malcovati, Franco Maloberti:
Gain and offset mismatch calibration in multi-path sigma-delta modulators. 953-956 - Omid Oliaei:
Continuous-time sigma-delta modulator incorporating semi-digital FIR filters. 957-960 - Jianxin Zhang, Paul V. Brennan, Dai Jiang, E. Vinogradova, P. D. Smith:
Stability analysis of a sigma delta modulator. 961-964 - Janusz A. Starzyk, Russell P. Mohn:
Cost-oriented design of a 14-bit current steering DAC macrocell. 965-968 - Marko Kosunen, Jouko Vankka, Ilari Teikari, Kari Halonen:
DNL and INL yield models for a current-steering D/A converter. 969-972 - Tao Chen, Georges G. E. Gielen:
Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters. 973-976 - Konstantinos Doris, Arthur H. M. van Roermund, Domine Leenaerts:
Mismatch-based timing errors in current steering DACs. 977-980 - Huseyin Dine, Franco Maloberti:
An 8-bit current mode ripple folding A/D converter. 981-984 - Peter Kiss, Jesús Arias Álvarez, Dandan Li:
Stable high-order delta-sigma DACS. 985-988 - Luis Hernández, Susana Patón:
Continuous time sigma-delta modulators with transmission line resonators and improved jitter and excess loop delay performance. 989-992 - Yu-Hong Lin, Da-Huei Lee, Cheng-Chung Yang, Tai-Haur Kuo:
High-speed DACs with random multiple data-weighted averaging algorithm. 993-996 - Jen-Shiun Chiang, Pao-Chu Chou, Teng-Hung Chang:
Dual-mode sigma-delta modulator for wideband receiver applications. 997-1000 - Rémi Le Révérend, Izzet Kale, Guy Delight, Dik Morling, Steve Morris:
An ultra-low power double-sampled A/D MASH ΣΔ modulator. 1001-1004 - Dag T. Wisland, Mats Erling Høvin, Tor Sverre Lande:
Quantization noise in the first-order non-feedback delta-sigma modulator with DC-input. 1005-1008 - Daeik D. Kim, Martin A. Brooke:
A 1.4G samples/sec comb filter design for decimation of sigma-delta modulator output. 1009-1012 - Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon:
Continuous-time, frequency translating, bandpass delta-sigma modulator. 1013-1016 - Teemu Salo, Saska Lindfors, Kari Halonen:
BP decimation filter for IF-sampling merged with BP ΣΔ-modulator. 1017-1020 - Jens Sauerbrey, Martin Wittig, Doris Schmitt-Landsiedel, Roland Thewes:
0.65V sigma-delta modulators. 1021-1024 - Jae Hoon Shim, In-Cheol Park, Beomsup Kim:
A hybrid delta-sigma modulator with adaptive calibration. 1025-1028 - Frank Henkel, Ulrich Langmann:
Excess loop delay effects in continuous-time quadrature bandpass sigma-delta modulators. 1029-1032 - Amin Quasem Safarian, F. Sahandi, Seyed Mojtaba Atarodi:
A new low-power sigma-delta modulator with the reduced number of op-amps for speech band applications. 1033-1036 - Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli:
Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators. 1037-1040 - X. Wang, Yong Ping Xu, Z. Wang, S. Liw, W. H. Sun, L. S. Tan:
A bandpass sigma-delta modulator employing micro-mechanical resonator. 1041-1044 - Mohammad Yavari, Omid Shoaei, Ali Afzali-Kusha:
A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25µm CMOS. 1045-1048 - F. Esahani, Philipp Basedau, Roland Ryter, Rolf Becker:
An 82 dB CMOS continuous-time complex bandpass sigma-delta ADC for GSM/EDGE. 1049-1052 - Francisco Colodro Ruiz, Antonio Jesús Torralba Silgado:
New dual-quantization multibit sigma-delta modulators with digital noise-shaping. 1053-1056 - Lukas Dörrer, Antonio Di Giandomenico, Andreas Wiesbauer:
A 10-bit, 4 mW continuous-time sigma-delta ADC for UMTS in a 0.12µm CMOS process. 1057-1060 - Chon-In Lao, Ho-leng Leong, Kuoi-Fok Au, Kuok-Hang Mok, Seng-Pan U., Rui Paulo Martins:
A 10.7-MHz bandpass sigma-delta modulator using double-delay single-opamp SC resonator with double-sampling. 1061-1064 - Marco Cassia, Peter Shah, Erik Bruun:
A spur-free fractional-N ΣΔ PLL for GSM applications: linear model and simulations. 1065-1068 - Jannik Hammel Nielsen, Erik Bruun:
A design methodology for power-efficient continuous-time Sigma-Delta A/D converters. 1069-1072 - Yamu Hu, Zhijun Lu, Mohamad Sawan:
A low-voltage 38µW sigma-delta modulator dedicated to wireless signal recording applications. 1073-1076
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