Jinian Bian

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Chung-Kuan Cheng

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Publications

2010
[c50]
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Ou He, Sheqin Dong, Jinian Bian, Satoshi Goto, Chung-Kuan Cheng:
Bus via reduction based on floorplan revising. ACM Great Lakes Symposium on VLSI 2010: 9-14
2008
[c35]
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  - conf/iccad/HeDBGC08
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Ou He, Sheqin Dong, Jinian Bian, Satoshi Goto, Chung-Kuan Cheng:
A novel fixed-outline floorplanner with zero deadspace for hierarchical design. ICCAD 2008: 16-23
2007
[j5]
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  - journals/tcad/LiHZZBYYPC07
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Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng:
Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 645-658 (2007)
2006
[j3]
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  - journals/tcas/LiHZCBYPC06
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Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng:
Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(12): 2637-2646 (2006)
[c17]
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  - conf/ispd/LiHZZBYPC06
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  - https://dblp.org/rec/conf/ispd/LiHZZBYPC06
Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng:
Integrating dynamic thermal via planning with 3D floorplanning algorithm. ISPD 2006: 178-185

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