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Kevin Huang 0005
Person information
- affiliation: Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan
Other persons with the same name
- Kevin Huang — disambiguation page
- Kevin Huang 0001 — Trinity College, Department of Engineering, Hartford, CT, USA (and 1 more)
- Kevin Huang 0002 — JD AI Research, Mountain View, CA, USA (and 1 more)
- Kevin Huang 0003 — Carnegie Mellon University, Pittsburgh, PA, USA (and 1 more)
- Kevin Huang 0004 — Massachusetts Institute of Technology (MIT), Department of Materials Science and Engineering, Cambridge, MA, USA
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2010 – 2019
- 2015
- [c4]Henry Hsieh, Sang H. Dhong, Cheng-Chung Lin, Ming-Zhang Kuo, Kuo-Feng Tseng, Ping-Lin Yang, Kevin Huang, Min-Jer Wang, Wei Hwang:
Custom 6-R, 2- or 4-W multi-port register files in an ASIC SOC with a DVFS window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS technology. CICC 2015: 1-3 - 2014
- [c3]Sang H. Dhong, Richard Guo, Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Kevin Huang, Min-Jer Wang, Wei Hwang:
A 0.42V Vccmin ASIC-compatible pulse-latch solution as a replacement for a traditional master-slave flip-flop in a digital SOC. CICC 2014: 1-4 - [c2]Ming-Zhang Kuo, Henry Hsieh, Sang H. Dhong, Ping-Lin Yang, Cheng-Chung Lin, Ryan Tseng, Kevin Huang, Min-Jer Wang, Wei Hwang:
A 16kB tile-able SRAM macro prototype for an operating window of 4.8GHz at 1.12V VDD to 10 MHz at 0.5V in a 28-nm HKMG CMOS. CICC 2014: 1-4 - [c1]Ping-Lin Yang, Cheng-Chung Lin, Ming-Zhang Kuo, Sang-Hoo Dhong, Chien-Min Lin, Kevin Huang, Ching-Nen Peng, Min-Jer Wang:
A 4-GHz universal high-frequency on-chip testing platform for IP validation. VTS 2014: 1-6
Coauthor Index
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last updated on 2024-11-04 20:46 CET by the dblp team
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