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Jeff Sondeen
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Journal Articles
- 2005
- [j1]Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca:
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System. J. VLSI Signal Process. 40(1): 73-84 (2005)
Conference and Workshop Papers
- 2009
- [c9]Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper:
Multicast routing with dynamic packet fragmentation. ACM Great Lakes Symposium on VLSI 2009: 113-116 - 2008
- [c8]Taek-Jun Kwon, Jeff Sondeen, Jeff Draper:
Floating-point division and square root implementation using a Taylor-series expansion algorithm. ICECS 2008: 702-705 - 2006
- [c7]Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper:
A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. ISCAS 2006 - 2005
- [c6]Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper:
An area-efficient and protected network interface for processing-in-memory systems. ISCAS (3) 2005: 2951-2954 - [c5]Taek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper:
Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. ISCAS (4) 2005: 3331-3334 - 2004
- [c4]Taek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper:
A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. ISCAS (2) 2004: 453-456 - [c3]Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper:
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. VLSI Design 2004: 863-868 - 2003
- [c2]Joong-Seok Moon, Taek-Jun Kwon, Jeff Sondeen, Jeffrey Draper:
An area-efficient standard-cell floating-point unit design for a processing-in-memory system. ESSCIRC 2003: 57-60 - 2002
- [c1]Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim:
Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP 2002: 163-172
Coauthor Index
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