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Dong Hyuk Woo
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Books and Theses
- 2010
- [b1]Dong Hyuk Woo:
Designing heterogeneous many-core processors to provide high performance under limited chip power budget. Georgia Institute of Technology, Atlanta, GA, USA, 2010
Journal Articles
- 2015
- [j9]Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). IEEE Trans. Computers 64(1): 112-125 (2015) - [j8]Jaekyu Lee, Dong Hyuk Woo, Hyesoon Kim, Mani Azimi:
GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs. IEEE Trans. Computers 64(11): 3167-3180 (2015) - 2013
- [j7]Dong Hyuk Woo, Nak Hee Seong, Hsien-Hsin S. Lee:
Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 1-13 (2013) - 2011
- [j6]Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee:
Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out. IEEE Micro 31(1): 119-127 (2011) - 2010
- [j5]Soo Young Shin, Dong Hyuk Woo, Jongwook Lee, Hong Seong Park, Wook Hyun Kwon:
Active Channel Reservation for Coexistence Mechanism (ACROS) for IEEE 802.15.4 and IEEE 802.11. IEICE Trans. Commun. 93-B(8): 2082-2087 (2010) - [j4]Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Hsien-Hsin S. Lee:
Chameleon: Virtualizing idle acceleration cores of a heterogeneous multicore processor for caching and prefetching. ACM Trans. Archit. Code Optim. 7(1): 3:1-3:35 (2010) - 2009
- [j3]Dong Hyuk Woo, Hsien-Hsin S. Lee:
PROPHET: goal-oriented provisioning for highly tunable multicore processors in cloud computing. ACM SIGOPS Oper. Syst. Rev. 43(2): 102-103 (2009) - 2008
- [j2]Dong Hyuk Woo, Hsien-Hsin S. Lee:
Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era. Computer 41(12): 24-31 (2008) - [j1]Dong Hyuk Woo, Hsien-Hsin S. Lee, Joshua B. Fryman, Allan D. Knies, Marsha Eng:
POD: A 3D-Integrated Broad-Purpose Acceleration Layer. IEEE Micro 28(4): 28-40 (2008)
Conference and Workshop Papers
- 2013
- [c11]Aniruddha S. Vaidya, Anahita Shayesteh, Dong Hyuk Woo, Roy Saharoy, Mani Azimi:
SIMD divergence optimization through intra-warp compaction. ISCA 2013: 368-379 - 2012
- [c10]Jong-Hyuk Lee, Ziyi Liu, Xiaonan Tian, Dong Hyuk Woo, Weidong Shi, Dainis Boumber, Yonghong Yan, Kyeong-An Kwon:
Acceleration of bulk memory operations in a heterogeneous multicore architecture. PACT 2012: 423-424 - [c9]Weidong Shi, Jong-Hyuk Lee, Taeweon Suh, Dong Hyuk Woo, Xinwen Zhang:
Architectural support of multiple hypervisors over single platform for enhancing cloud computing security. Conf. Computing Frontiers 2012: 75-84 - [c8]Dongki Kim, Sungkwang Lee, Jaewoong Chung, Daehyun Kim, Dong Hyuk Woo, Sungjoo Yoo, Sunggu Lee:
Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU. DAC 2012: 888-896 - [c7]Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
3D-MAPS: 3D Massively parallel processor with stacked memory. ISSCC 2012: 188-190 - 2010
- [c6]Dong Hyuk Woo, Hsien-Hsin S. Lee:
COMPASS: a programmable data prefetcher using idle GPU shaders. ASPLOS 2010: 297-310 - [c5]Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. CICC 2010: 1-4 - [c4]Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, Hsien-Hsin S. Lee:
An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth. HPCA 2010: 1-12 - [c3]Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee:
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. ISCA 2010: 383-394 - [c2]Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee:
SAFER: Stuck-At-Fault Error Recovery for Memories. MICRO 2010: 115-124 - 2006
- [c1]Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee:
Reducing energy of virtual cache synonym lookup using bloom filters. CASES 2006: 179-189
Coauthor Index
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