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ORCIDKadaba Lakshmikumar
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2020 – today
- 2024
[j12]Vishal Saxena
, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar:
Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1632-1637 (2024)- 2023
- [c7]Kadaba Lakshmikumar, Alexander Kurylak, Romesh Kumar Nandwana, Bibhu Das, Joe Pampanin, Mike Brubaker, Pavan Kumar Hanumolu:
A 7 pA/$\surd\text{Hz}$ Asymmetric Differential TIA for 100Gb/s PAM-4 links with -14dBm Optical Sensitivity in 16nm CMOS. ISSCC 2023: 206-207 - 2022
- [j11]Abhishek Bhat, Romesh Kumar Nandwana, Kadaba Lakshmikumar:
An Interference Suppression Technique for Millimeter-Wave LC VCOs Using a Multiport Coupled Inductor. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 919-923 (2022) - [c6]Kadaba R. Lakshmikumar, Alexander Kurylak, Romesh Kumar Nandwana, Bibhu Das, Joe Pampanin, Vito Boccuzzi, Pavan Kumar Hanumolu:
High-Performance CMOS TIA for Data Center Optical Interconnects. BCICTS 2022: 9-16 - 2021
- [j10]Mostafa Gamal Ahmed, Dongwook Kim, Romesh Kumar Nandwana, Ahmed Elkholy, Kadaba R. Lakshmikumar, Pavan Kumar Hanumolu:
A 16-Gb/s -11.6-dBm OMA Sensitivity 0.7-pJ/bit Optical Receiver in 65-nm CMOS Enabled by Duobinary Sampling. IEEE J. Solid State Circuits 56(9): 2795-2803 (2021)
2010 – 2019
- 2019
- [j9]Kadaba Lakshmikumar, Alexander Kurylak, Manohar Nagaraju, Richard Booth, Romesh Kumar Nandwana, Joe Pampanin, Vito Boccuzzi:
A Process and Temperature Insensitive CMOS Linear TIA for 100 Gb/s/λ PAM-4 Optical Links. IEEE J. Solid State Circuits 54(11): 3180-3190 (2019) - 2018
- [c5]Kadaba Lakshmikumar, Alexander Kurylak, Manohar Nagaraju, Richard Booth, Joe Pampanin:
A process and temperature insensitive CMOS linear TIA for 100 Gbps/λ PAM-4 optical links. CICC 2018: 1-4 - 2016
- [j8]K. R. Lakshmikumar:
Patent Abstracts. IEEE J. Solid State Circuits 51(3): 777-781 (2016)
2000 – 2009
- 2009
- [j7]Kadaba Lakshmikumar:
Analog PLL Design With Ring Oscillators at Low-Gigahertz Frequencies in Nanometer CMOS: Challenges and Solutions. IEEE Trans. Circuits Syst. II Express Briefs 56-II(5): 389-393 (2009) - [c4]Sander Gierkink, Kadaba Lakshmikumar, Vinod Mukundagiri, Drahoslav Lím, Arnold Muralt, Fred Larsen:
A 3-level PWM ADSL2+ CO line driver. CICC 2009: 543-546 - 2007
- [c3]Kadaba Lakshmikumar, Vinod Mukundagiri, Sander Laurentius Johannes Gierkink:
A Process and Temperature Compensated Two-Stage Ring Oscillator. CICC 2007: 691-694 - 2003
- [c2]R. Wadhwa, A. Aggarwal, J. Edwards, M. Ehlert, J. Hoehn, G. Miao, Kadaba Lakshmikumar, John M. Khoury:
A low-power 0.13μm CMOS OC-48 SONET and XAUI compliant SERDES. CICC 2003: 577-580 - [c1]G. Miao, P. Ju, D. Ng, John M. Khoury, Kadaba Lakshmikumar:
A fully-integrated 10.5 to 13.5 Gbps transceiver in 0.13 μm CMOS. CICC 2003: 595-598 - 2001
- [j6]John M. Khoury, Kadaba R. Lakshmikumar:
High-speed serial transceivers for data communication systems. IEEE Commun. Mag. 39(7): 160-165 (2001) - 2000
- [j5]William B. Wilson, Un-Ku Moon, Kadaba R. Lakshmikumar, Liang Dai:
A CMOS self-calibrating frequency synthesizer. IEEE J. Solid State Circuits 35(10): 1437-1444 (2000)
1990 – 1999
- 1999
- [j4]K. R. Lakshmikumar, J. Anidjar:
A low-voltage line driver for digital signaling interface. IEEE J. Solid State Circuits 34(1): 111-115 (1999) - 1996
- [j3]Vladimir Friedman, Kadaba R. Lakshmikumar, David L. Price, Tuan N. Le, Jit Kumar:
A baseband processor for IS-54 cellular telephony. IEEE J. Solid State Circuits 31(5): 646-655 (1996)
1980 – 1989
- 1988
- [j2]Cormac S. G. Conroy, William A. Lane, Michael A. Moran, Kadaba R. Lakshmikumar, Miles A. Copeland, Robert A. Hadaway:
Comments, with reply, on 'Characterization and modeling of mismatch in MOS transistors for precision analog design'. IEEE J. Solid State Circuits 23(1): 294-296 (1988) - [j1]Bang-Sup Song, Michael F. Tompsett, Kadaba R. Lakshmikumar:
A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter. IEEE J. Solid State Circuits 23(6): 1324-1333 (1988)
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