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Conference and Workshop Papers
- 2024
[c5]W. Kim, Valerio Pica
, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao:
A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays. IMW 2024: 1-4- [c4]Taras Ravsher, Andrea Fantini, Kruti Trivedi, Nouredine Rassoul, Harold Dekkers, Attilio Belmonte, Jan Van Houdt, Valeri Afanas'ev, Kurt Wostyn, Sebastien Couet, Gouri Sankar Kar:
Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification. IMW 2024: 1-4 - [c3]Farrukh Yasin, A. Palomino, A. Kumar, Valerio Pica, Simon Van Beek, Giacomo Talmelli, Van D. Nguyen, Stefan Cosemans, D. Crotti, Kurt Wostyn, Gouri Sankar Kar, Sebastien Couet:
Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c2]Gaspard Hiblot, Taras Ravsher, Roger Loo, Bhuvaneshwari Yengula Venkata Ramana, Nathali Franchina-Vergel, Andrea Fantini, Shamin Houshmand Sharifi, Nina Bazzazian, Kurt Wostyn, Loris Angelo Labbate, Sebastien Couet, Gouri Sankar Kar:
NPN Si/SiGe memory selector with non-linearity>105 and ON-current>6MA/cm2. ESSDERC 2023: 164-167 - [c1]Siddharth Rao, Kaiming Cai, Giacomo Talmelli, Nathali Franchina-Vergel, Ward Janssens, Hubert Hody, Farrukh Yasin, Kurt Wostyn, Sebastien Couet:
Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications. IMW 2023: 1-4
Coauthor Index
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