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2010 – 2019
- 2017
[j38]Xiao Wu, Zhou Jin, Dan Niu, Yasuaki Inoue:
An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(2): 619-628 (2017)- [j37]Jing Wang, Li Ding, Qiang Li, Hirofumi Shinohara, Yasuaki Inoue:
Accurate Nanopower Supply-Insensitive CMOS Unit Vth Extractor and αVth Extractor with Continuous Variety. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(5): 1145-1155 (2017) - 2016
- [j36]Jing Wang, Qiang Li, Li Ding, Hirofumi Shinohara, Yasuaki Inoue:
A 3.5ppm/°C 0.85V Bandgap Reference Circuit without Resistors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7): 1430-1437 (2016) - 2015
- [c25]Dan Niu, Yasuaki Inoue, Zhou Jin, Xiao Wu:
A netlist implementation of the Newton fixed-point homotopy method for MOS transistor circuits. MWSCAS 2015: 1-4 - 2014
- [j35]Li Ding, Zhangcai Huang, Atsushi Kurokawa, Jing Wang, Yasuaki Inoue:
An Effective Model of the Overshooting Effect for Multiple-Input Gates in Nanometer Technologies. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(5): 1059-1074 (2014) - [c24]Hanqiu Mo, Yasuaki Inoue:
A Magnetic Resonant Coupling Wireless Power Transmission System under Different Load Conditions. ICITCS 2014: 1-4 - [c23]Qiang Li, Jing Wang, Yasuaki Inoue:
A high efficiency CMOS rectifier with ON-OFF response compensation for wireless power transfer in biomedical applications. ISIC 2014: 91-94 - [c22]Zhou Jin, Xiao Wu, Yasuaki Inoue, Dan Niu:
A ramping method combined with the damped PTA algorithm to find the DC operating points for nonlinear circuits. ISIC 2014: 576-579 - [c21]Xiao Wu, Zhou Jin, Dan Niu, Yasuaki Inoue:
The limitation for the growth of step of DPTA method. ISIC 2014: 588-591 - 2013
- [j34]Dan Niu, Xiao Wu, Zhou Jin, Yasuaki Inoue:
An Effective and Globally Convergent Newton Fixed-Point Homotopy Method for MOS Transistor Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(9): 1848-1856 (2013) - [j33]Zhou Jin, Xiao Wu, Dan Niu, Yasuaki Inoue:
Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(12): 2524-2532 (2013) - [c20]Li Ding, Jing Wang, Zhangcai Huang, Atsushi Kurokawa, Yasuaki Inoue:
An analytical model of the overshooting effect for multiple-input gates in nanometer technologies. ISCAS 2013: 1712-1715 - 2012
- [j32]Dan Niu, Kazutoshi Sako, Guangming Hu, Yasuaki Inoue:
A Globally Convergent Nonlinear Homotopy Method for MOS Transistor Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12): 2251-2260 (2012) - [j31]Li Ding, Zhangcai Huang, Minglu Jiang, Atsushi Kurokawa, Yasuaki Inoue:
Modeling the Overshooting Effect of Multi-Input gate in Nanometer Technologies. J. Circuits Syst. Comput. 21(6) (2012) - [c19]Gong Chen, Bo Yang, Shigetoshi Nakatake, Zhangcai Huang, Yasuaki Inoue:
A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. ISCAS 2012: 938-941 - 2011
- [j30]Minglu Jiang, Zhangcai Huang, Atsushi Kurokawa, Qiang Li, Bin Lin, Yasuaki Inoue:
A Non-Iterative Method for Calculating the Effective Capacitance of CMOS Gates with Interconnect Load Effect. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(5): 1201-1209 (2011) - [c18]Zhangcai Huang, Yasuaki Inoue:
A sub-100nA power management system for wireless structure health monitoring applications. ISCAS 2011: 2897-2900 - 2010
- [j29]Zhangcai Huang, Atsushi Kurokawa, Masanori Hashimoto
, Takashi Sato, Minglu Jiang, Yasuaki Inoue:
Modeling the Overshooting Effect for CMOS Inverter Delay Analysis in Nanometer Technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2): 250-260 (2010) - [c17]Qiang Li, Renyuan Zhang, Zhangcai Huang, Yasuaki Inoue:
A low voltage CMOS rectifier for wirelessly powered devices. ISCAS 2010: 873-876 - [c16]Zhangcai Huang, Qin Luo, Yasuaki Inoue:
A CMOS Sub-l-V nanopower current and voltage reference with leakage compensation. ISCAS 2010: 4069-4072
2000 – 2009
- 2009
- [j28]Ryosuke Inagaki, Norio Sadachika, Mitiko Miura-Mattausch, Yasuaki Inoue:
A PN Junction-Current Model for Advanced MOSFET Technologies. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 983-989 (2009) - [j27]Zhangcai Huang, Minglu Jiang, Yasuaki Inoue:
A Highly Linear and Wide Input Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback. IEICE Trans. Electron. 92-C(6): 806-814 (2009) - [j26]Minglu Jiang, Zhangcai Huang, Atsushi Kurokawa, Shuai Fang, Yasuaki Inoue:
Accurate Method for Calculating the Effective Capacitance with RC Loads Based on the Thevenin Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(10): 2531-2539 (2009) - [j25]Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue:
A GIDL-Current Model for Advanced MOSFET Technologies without Binning. Inf. Media Technol. 4(2): 240-249 (2009) - [j24]Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue:
A GIDL-Current Model for Advanced MOSFET Technologies without Binning. IPSJ Trans. Syst. LSI Des. Methodol. 2: 93-102 (2009) - 2008
- [j23]Shin-ichi Ohkawa, Hiroo Masuda, Yasuaki Inoue:
A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(4): 1062-1070 (2008) - [j22]Shuaiqi Wang, Fule Li, Yasuaki Inoue:
A 12-bit 3.7-Msample/s Pipelined A/D Converter Based on the Novel Capacitor Mismatch Calibration Technique. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(9): 2465-2474 (2008) - 2007
- [j21]Zhangcai Huang, Yasuaki Inoue, Hong Yu, Jun Pan, Yun Yang, Quan Zhang, Shuai Fang:
Behavioral Circuit Macromodeling and Analog LSI Implementation for Automobile Engine Intake System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 732-740 (2007) - [j20]Jun Pan, Yasuaki Inoue, Zheng Liang, Zhangcai Huang, Weilun Huang:
A Low-Power Sub-1-V Low-Voltage Reference Using Body Effect. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 748-755 (2007) - [j19]Jun Pan, Yasuaki Inoue, Zheng Liang:
An Energy Management Circuit for Self-Powered Ubiquitous Sensor Modules Using Vibration-Based Energy. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(10): 2116-2123 (2007) - [j18]Hong Yu, Yasuaki Inoue, Kazutoshi Sako, Xiaochuan Hu, Zhangcai Huang:
An Effective SPICE3 Implementation of the Compound Element Pseudo-Transient Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(10): 2124-2131 (2007) - [c15]Zhangcai Huang, Hong Yu, Atsushi Kurokawa, Yasuaki Inoue:
Modeling the Overshooting Effect for CMOS Inverter in Nanometer Technologies. ASP-DAC 2007: 565-570 - 2006
- [j17]Zhangcai Huang, Atsushi Kurokawa, Yun Yang, Hong Yu, Yasuaki Inoue:
Modeling the Influence of Input-to-Output Coupling Capacitance on CMOS Inverter Delay. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 840-846 (2006) - [j16]Atsushi Kurokawa, Akira Kasebe, Toshiki Kanamoto, Yun Yang, Zhangcai Huang, Yasuaki Inoue, Hiroo Masuda:
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 847-855 (2006) - [j15]Atsushi Kurokawa, Hiroo Masuda, Junko Fujii, Toshinori Inoshita, Akira Kasebe, Zhangcai Huang, Yasuaki Inoue:
Determination of Interconnect Structural Parameters for Best- and Worst-Case Delays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 856-864 (2006) - [j14]Hong Yu, Yasuaki Inoue, Yuki Matsuya, Zhangcai Huang:
An Effective Pseudo-Transient Algorithm for Finding Dc Solutions of Nonlinear Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(10): 2724-2731 (2006) - [j13]Shuaiqi Wang, Fule Li, Yasuaki Inoue:
A 15-bit 10-Msample/s Pipelined A/D Converter Based on Incomplete Settling Principle. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(10): 2732-2739 (2006) - [c14]Zhangcai Huang, Yasuaki Inoue, Hong Yu, Quan Zhang:
A Wide Dynamic Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback. APCCAS 2006: 708-711 - [c13]Zhangcai Huang, Yasuaki Inoue, Quan Zhang, Yuehu Zhou, Long Xie, Harutoshi Ogai:
Behavioral macromodeling of analog LSI implementation for automobile intake system. ISCAS 2006 - [c12]Hong Yu, Yasuaki Inoue, Yuki Matsuya, Zhangcai Huang:
An effective pseudo-transient algorithm for finding DC operating points of nonlinear circuits. ISCAS 2006 - 2005
- [j12]Kiyotaka Yamamura, Wataru Kuroki, Hideaki Okuma, Yasuaki Inoue:
Path Following Circuits - SPICE-Oriented Numerical Methods Where Formulas are Described by Circuits - . IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 825-831 (2005) - [j11]Yasuaki Inoue, Yu Imai, Kiyotaka Yamamura:
A Homotopy Method Using a Nonlinear Auxiliary Function for Solving Transistor Circuits. IEICE Trans. Inf. Syst. 88-D(7): 1401-1408 (2005) - [j10]Yu Imai, Kiyotaka Yamamura, Yasuaki Inoue:
An Efficient Homotopy Method for Finding DC Operating Points of Nonlinear Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2554-2561 (2005) - [j9]Zhangcai Huang, Atsushi Kurokawa, Yasuaki Inoue, Junfa Mao:
A Novel Model for Computing the Effective Capacitance of CMOS Gates with Interconnect Loads. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2562-2569 (2005) - [j8]Atsushi Kurokawa, Toshiki Kanamoto, Akira Kasebe, Yasuaki Inoue, Hiroo Masuda:
A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(11): 3180-3187 (2005) - [j7]Zhangcai Huang, Atsushi Kurokawa, Jun Pan, Yasuaki Inoue:
Modeling the Effective Capacitance of Interconnect Loads for Predicting CMOS Gate Slew. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3367-3374 (2005) - [j6]Yun Yang, Atsushi Kurokawa, Yasuaki Inoue, Wenqing Zhao:
Efficient Large Scale Integration Power/Ground Network Optimization Based on Grid Genetic Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3412-3420 (2005) - [j5]Atsushi Kurokawa, Masanori Hashimoto, Akira Kasebe, Zhangcai Huang, Yun Yang, Yasuaki Inoue, Ryosuke Inagaki, Hiroo Masuda:
Second-Order Polynomial Expressions for On-Chip Interconnect Capacitance. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3453-3462 (2005) - [j4]Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda:
Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3471-3478 (2005) - [c11]Yun Yang, Wenqing Zhao, Yasuaki Inoue:
High-performance systolic arrays for band matrix multiplication. ISCAS (2) 2005: 1130-1133 - [c10]Zhangcai Huang, Atsushi Kurokawa, Yasuaki Inoue:
Effective capacitance for gate delay with RC loads. ISCAS (3) 2005: 2795-2798 - [c9]Kiyotaka Yamamura, Wataru Kuroki, Yasuaki Inoue:
Path following circuits - SPICE-oriented numerical methods where formulas are described by circuits $. ISCAS (4) 2005: 3761-3764 - [c8]Yu Imai, Kiyotaka Yamamura, Yasuaki Inoue:
An efficient homotopy method for finding DC operating points of nonlinear circuits. ISCAS (5) 2005: 4911-4914 - [c7]Atsushi Kurokawa, Masaharu Yamamoto, Nobuto Ono, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda:
Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture. ISQED 2005: 153-158 - [c6]Atsushi Kurokawa, Toshiki Kanamoto, Tetsuya Ibe, Akira Kasebe, Wei Fong Chang, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda:
Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. ISQED 2005: 586-591 - 2004
- [c5]Atsushi Kurokawa, Toshiki Kanamoto, Akira Kasebe, Yasuaki Inoue, Hiroo Masuda:
Efficient capacitance extraction method for interconnects with dummy fills. CICC 2004: 485-488 - 2003
- [j3]Yasuaki Inoue, Saeko Kusanobu:
Theorems on the Unique Initial Solution for Globally Convergent Homotopy Methods. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(9): 2184-2191 (2003) - [c4]Kiyotaka Yamamura, Naoya Igarashi, Yasuaki Inoue:
An interval algorithm for finding all solutions of nonlinear resistive circuits. ISCAS (3) 2003: 192-195 - [c3]Yasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura, M. Ando:
An effective initial solution algorithm for globally convergent homotopy methods. ISCAS (3) 2003: 196-199 - 2002
- [j2]Yasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura:
A Practical Approach for the Fixed-Point Homotopy Method Using a Solution-Tracing Circuit. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(1): 222-233 (2002) - [j1]Akio Ushida, Yoshihiro Yamagami, Yoshifumi Nishio, Ikkei Kinouchi, Yasuaki Inoue:
An efficient algorithm for finding multiple DC solutions based onthe SPICE-oriented Newton homotopy method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(3): 337-348 (2002) - 2001
- [c2]Yasuaki Inoue, Eigo Kaji, Sarko Kasanobu:
A solution-tracing circuit for the fixed-point homotopy method. ISCAS (3) 2001: 21-24 - [c1]Akio Ushida, Yoshihiro Yamagami, Ikkei Kinouchi, Yoshifumi Nishio, Yasuaki Inoue:
An efficient algorithm for finding multiple DC solutions based on Spice oriented Newton homotopy method. ISCAS (5) 2001: 447-450
Coauthor Index
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