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2020 – today
- 2024
[j7]Vincent Dumoulin, Wenjing Rao, Natasha Devroye:
On the Response Entropy of APUFs. J. Hardw. Syst. Secur. 8(3): 187-203 (2024)- [j6]Zhenye Huang, Deyou Tang, Rong Zhao, Wenjing Rao:
A scientific paper recommendation method using the time decay heterogeneous graph. Scientometrics 129(3): 1589-1613 (2024) - [i3]Vincent Dumoulin, Wenjing Rao, Natasha Devroye:
On the Response Entropy of APUFs. CoRR abs/2406.19975 (2024) - 2023
- [c34]Yeqi Wei, Wenjing Rao, Natasha Devroye:
APUF Production Line Faults: Uniqueness and Testing. DATE 2023: 1-6 - [c33]Vincent Dumoulin, Wenjing Rao, Natasha Devroye:
Active learning for fast and slow modeling attacks on Arbiter PUFs. DSD 2023: 260-268 - [i2]Vincent Dumoulin, Wenjing Rao, Natasha Devroye:
Active learning for fast and slow modeling attacks on Arbiter PUFs. CoRR abs/2308.13645 (2023) - 2022
- [c32]Yeqi Wei, Tim Fox, Vincent Dumoulin, Wenjing Rao
, Natasha Devroye:
APUF Faults: Impact, Testing, and Diagnosis. DATE 2022: 442-447 - 2020
- [j5]Jian Xu, Soumya Banerjee, Wenjing Rao:
The existence of universally agreed fairest semi-matchings in any given bipartite graph. Theor. Comput. Sci. 818: 83-91 (2020)
2010 – 2019
- 2018
- [c31]Soroush Khaleghi, Wenjing Rao:
Hardware Obfuscation Using Strong PUFs. ISVLSI 2018: 321-326 - [i1]Soroush Khaleghi, Wenjing Rao:
Repairability Enhancement of Scalable Systems with Locally Shared Spares. CoRR abs/1812.01209 (2018) - 2017
- [c30]Soumya Banerjee, Wenjing Rao:
A local reconfiguration based scalable fault tolerant many-processor array. ASP-DAC 2017: 432-437 - [c29]Jian Xu, Soumya Banerjee, Wenjing Rao:
The Existence of Universally Agreed Fairest Semi-matchings in Any Given Bipartite Graph. COCOON 2017: 529-541 - [c28]Soumya Banerjee, Wenjing Rao:
A General Design Framework for Sparse Parallel Prefix Adders. ISVLSI 2017: 231-236 - 2016
- [c27]Soumya Banerjee, Wenjing Rao:
A general approach for highly defect tolerant Parallel Prefix Adder design. DATE 2016: 666-671 - [c26]Soroush Khaleghi, Paolo Vinella, Soumya Banerjee, Wenjing Rao:
An STT-MRAM based strong PUF. NANOARCH 2016: 129-134 - 2015
- [c25]Soroush Khaleghi, Kai Da Zhao, Wenjing Rao:
IC Piracy prevention via Design Withholding and Entanglement. ASP-DAC 2015: 821-826 - [c24]Soumya Banerjee, Wenjing Rao:
On the conditions of guaranteed k-fault tolerant systems supporting on-the-fly repairs. ICCD 2015: 387-390 - 2014
- [j4]Yehua Su, Wenjing Rao:
An Integrated Framework Toward Defect-Tolerant Logic Implementation Onto Nanocrossbars. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 64-75 (2014) - [c23]Davide Giri, Marco Vacca, Giovanni Causapruno, Wenjing Rao, Mariagrazia Graziano, Maurizio Zamboni:
A standard cell approach for MagnetoElastic NML circuits. NANOARCH 2014: 65-70 - 2013
- [c22]Yehua Su, Wenjing Rao:
Defect-tolerant logic hardening for crossbar-based nanosystems. DATE 2013: 1801-1806 - [c21]Soroush Khaleghi, Wenjing Rao:
Spare sharing network enhancement for scalable systems. DFTS 2013: 249-254 - [c20]Soroush Khaleghi, Wenjing Rao:
Constructing spare sharing networks for reliability enhancement of scalable systems. SiPS 2013: 336-341 - [c19]Soumya Banerjee, Kai Da Zhao, Wenjing Rao, Milos Zefran:
Decentralized self-balancing systems. VLSI-SoC 2013: 340-343 - 2011
- [j3]Wenjing Rao, Chengmo Yang, Ramesh Karri, Alex Orailoglu:
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. Computer 44(2): 46-53 (2011) - [c18]Yehua Su, Wenjing Rao:
Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously. ICCAD 2011: 456-462 - 2010
- [c17]Yehua Su, Wenjing Rao:
On mismatch number distribution of nanocrossbar logic mapping. ICCD 2010: 132-137
2000 – 2009
- 2009
- [j2]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Logic Mapping in Crossbar-Based Nanoarchitectures. IEEE Des. Test Comput. 26(1): 68-77 (2009) - [c16]Yehua Su, Wenjing Rao:
Defect-Tolerant Logic Mapping on Nanoscale Crossbar Architectures and Yield Analysis. DFT 2009: 322-330 - [c15]Yehua Su, Wenjing Rao:
Runtime analysis for defect-tolerant logic mapping on nanoscale crossbar architectures. NANOARCH 2009: 75-78 - 2008
- [b1]Wenjing Rao:
Towards reliable nanoelectronic systems. University of California, San Diego, USA, 2008 - [c14]Wenjing Rao, Alex Orailoglu:
Towards fault tolerant parallel prefix adders in nanoelectronic systems. DATE 2008: 360-365 - [c13]Ilia Polian, Wenjing Rao:
Selective Hardening of NanoPLA Circuits. DFT 2008: 263-271 - [c12]Wenjing Rao, Alex Orailoglu, Keith Marzullo:
Locality aware redundancy allocation in nanoelectronic systems. NANOARCH 2008: 24-31 - 2007
- [j1]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Towards Nanoelectronics Processor Architectures. J. Electron. Test. 23(2-3): 235-254 (2007) - [c11]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs. DATE 2007: 865-869 - [c10]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays. DSN 2007: 216-224 - 2006
- [c9]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Topology aware mapping of logic functions onto nanowire-based crossbar architectures. DAC 2006: 723-726 - [c8]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics. ETS 2006: 63-68 - [c7]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance. VTS 2006: 214-221 - 2005
- [c6]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Fault tolerant nanoelectronic processor architectures. ASP-DAC 2005: 311-316 - [c5]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors. ICCD 2005: 533-542 - 2004
- [c4]Wenjing Rao, Alex Orailoglu, George Su:
Frugal linear network-based test decompression for drastic test cost reductions. ICCAD 2004: 721-725 - [c3]Wenjing Rao, Alex Orailoglu, Ramesh Karri:
Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems. ITC 2004: 472-478 - 2003
- [c2]Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu:
Test application time and volume compression through seed overlapping. DAC 2003: 732-737 - [c1]Wenjing Rao, Alex Orailoglu:
Virtual Compression through Test Vector Stitching for Scan Based Designs. DATE 2003: 10104-10109
Coauthor Index
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