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Antoni Roca 0001
Person information
- affiliation: Universitat Politecnica de Catalunya (UPC), Barcelona, Spain
Other persons with the same name
- Antoni Roca 0002 — Universidad Politécnica de Valencia, Spain
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2010 – 2019
- 2017
- [c15]Sergi Alcaide
, Carles Hernández
, Antoni Roca, Jaume Abella
:
DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. DAC 2017: 45:1-45:6 - [c14]Lucas Machado, Antoni Roca Perez, Jordi Cortadella:
Voltage Noise Analysis with Ring Oscillator Clocks. ISVLSI 2017: 1-6 - 2016
- [c13]Jordi Cortadella
, Marc Lupon, Alberto Moreno
, Antoni Roca, Sachin S. Sapatnekar
:
Ring Oscillator Clocks and Margins. ASYNC 2016: 19-26 - [c12]Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla:
Improving performance guarantees in wormhole mesh NoC designs. DATE 2016: 1485-1488 - 2015
- [j9]Antoni Roca, Carles Hernández
, Mario Lodde, José Flich
:
Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems. Comput. Electr. Eng. 45: 374-385 (2015) - [c11]Jordi Cortadella
, Luciano Lavagno, Pedro Lopez, Marc Lupon, Alberto Moreno
, Antoni Roca, Sachin S. Sapatnekar
:
Reactive clocks with variability-tracking jitter. ICCD 2015: 511-518 - 2014
- [j8]José Cano
, José Flich
, Antoni Roca, José Duato
, Marcello Coppola
, Riccardo Locatelli:
Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead. IEEE Trans. Computers 63(3): 557-569 (2014) - [c10]Javier de San Pedro
, Jordi Cortadella
, Antoni Roca:
A hierarchical approach for generating regular floorplans. ICCAD 2014: 655-662 - 2013
- [j7]Mario Lodde, Antoni Roca, José Flich
:
Built-in fast gather control network for efficient support of coherence protocols. IET Comput. Digit. Tech. 7(2) (2013) - [j6]Antoni Roca, Carles Hernández
, José Flich
, Federico Silla, José Duato
:
Silicon-aware distributed switch architecture for on-chip networks. J. Syst. Archit. 59(7): 505-515 (2013) - 2012
- [j5]Carles Hernández
, Antoni Roca, Federico Silla, José Flich
, José Duato
:
On the Impact of Within-Die Process Variation in GALS-Based NoC Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 294-307 (2012) - [c9]Antoni Roca, José Flich
, Giorgos Dimitrakopoulos
:
DESA: Distributed Elastic Switch Architecture for efficient networks-on-FPGAS. FPL 2012: 394-399 - [c8]Mario Lodde, Toni Roca, José Flich
:
Heterogeneous network design for effective support of invalidation-based coherency protocols. INA-OCMC@HiPEAC 2012: 1-4 - [c7]Antoni Roca, Carles Hernández
, José Flich
, Federico Silla, José Duato
:
Enabling High-Performance Crossbars through a Floorplan-Aware Design. ICPP 2012: 269-278 - 2011
- [j4]Carles Hernández
, Antoni Roca, José Flich
, Federico Silla, José Duato
:
Fault-Tolerant Vertical Link Design for Effective 3D Stacking. IEEE Comput. Archit. Lett. 10(2): 41-44 (2011) - [j3]Carles Hernández
, Antoni Roca, José Flich
, Federico Silla, José Duato
:
Characterizing the impact of process variation on 45 nm NoC-based CMPs. J. Parallel Distributed Comput. 71(5): 651-663 (2011) - [j2]Antoni Roca, José Flich
, Federico Silla, José Duato
:
A low-latency modular switch for CMP systems. Microprocess. Microsystems 35(8): 742-754 (2011) - [j1]Samuel Rodrigo, José Flich
, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato
:
Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(4): 534-547 (2011) - [c6]Antoni Roca, Carles Hernández
, José Flich
, Federico Silla, José Duato
:
A Distributed Switch Architecture for On-Chip Networks. ICPP 2011: 21-30 - [c5]Jesús Camacho Villanueva, José Flich
, Antoni Roca, José Duato
:
PC-Mesh: A Dynamic Parallel Concentrated Mesh. ICPP 2011: 642-651 - 2010
- [c4]Antoni Roca, José Flich
, Federico Silla, José Duato
:
A Latency-Efficient Router Architecture for CMP Systems. DSD 2010: 165-172 - [c3]Antoni Roca, José Flich
, Federico Silla, José Duato
:
VCTlite: Towards an efficient implementation of virtual cut-through switching in on-chip networks. HiPC 2010: 1-12 - [c2]Samuel Rodrigo, José Flich
, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato
:
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing. NOCS 2010: 25-32 - [c1]Carles Hernández
, Antoni Roca, Federico Silla, José Flich
, José Duato
:
Improving the Performance of GALS-Based NoCs in the Presence of Process Variation. NOCS 2010: 35-42
Coauthor Index
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