![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
Arda Yurdakul
Person information
Refine list
![note](https://dblp.dagstuhl.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [j15]Emre Bilgili
, Arda Yurdakul
:
Common Subexpression-Based Compression and Multiplication of Sparse Constant Matrices. IEEE Embed. Syst. Lett. 16(2): 82-85 (2024) - 2023
- [j14]Ceyhun Onur
, Arda Yurdakul
:
ElectAnon: A Blockchain-based, Anonymous, Robust, and Scalable Ranked-choice Voting Protocol. Distributed Ledger Technol. Res. Pract. 2(3): 1-25 (2023) - [c25]Mehmet Sirin Onen, Arda Yurdakul:
Container Scheduling Under ARINC 653 Scheduler Constraints. DSD 2023: 444-451 - [i9]Emre Bilgili, Arda Yurdakul:
Common Subexpression-based Compression and Multiplication of Sparse Constant Matrices. CoRR abs/2303.16106 (2023) - [i8]Ilkay Sikdokur, Inci M. Baytas, Arda Yurdakul:
EdgeConvEns: Convolutional Ensemble Learning for Edge Intelligence. CoRR abs/2307.14381 (2023) - 2022
- [c24]Cem Caglayan, Arda Yurdakul:
A Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning. DSD 2022: 224-231 - [c23]Umut Can Özyar, Arda Yurdakul:
A Decentralized Framework with Dynamic and Event-Driven Container Orchestration at the Edge. iThings/GreenCom/CPSCom/SmartData/Cybermatics 2022: 33-40 - [i7]Ilkay Sikdokur, Inci M. Baytas, Arda Yurdakul:
Image Classification on Accelerated Neural Networks. CoRR abs/2203.11081 (2022) - [i6]Ceyhun Onur, Arda Yurdakul:
ElectAnon: A Blockchain-Based, Anonymous, Robust and Scalable Ranked-Choice Voting Protocol. CoRR abs/2204.00057 (2022) - [i5]Umut Can Özyar, Arda Yurdakul:
A Decentralized Framework with Dynamic and Event-Driven Container Orchestration at the Edge. CoRR abs/2206.11663 (2022) - 2021
- [c22]Mehmet Alp Sarkisla, Arda Yurdakul:
SIMDify: Framework for SIMD-Processing with RISC-V Scalar Instruction Set. ACSW 2021: 7:1-7:10 - 2020
- [c21]Nur Hilal, Arda Yurdakul:
Model-based Design of a Roadside Unit for Emergency and Disaster Management. NOMS 2020: 1-6 - [i4]Ömer Faruk Irmak, Arda Yurdakul:
An Embedded RISC-V Core with Fast Modular Multiplication. CoRR abs/2009.14685 (2020)
2010 – 2019
- 2019
- [j13]Kazim Rifat Ozyilmaz
, Arda Yurdakul:
Designing a Blockchain-Based IoT With Ethereum, Swarm, and LoRa: The Software Solution to Create High Availability With Minimal Security Risks. IEEE Consumer Electron. Mag. 8(2): 28-34 (2019) - 2018
- [j12]Mehmet Tükel, Arda Yurdakul, Berna Örs
:
Customizable embedded processor array for multimedia applications. Integr. 60: 213-223 (2018) - [c20]Kazim Rifat Ozyilmaz
, Mehmet Dogan, Arda Yurdakul:
IDMoB: IoT Data Marketplace on Blockchain. CVCBT 2018: 11-19 - [c19]Ayse Vildan Nurdag, Bert Arnrich
, Arda Yurdakul:
WIP: Daily Life Oriented Indoor Localization by Fusion of Smartphone Sensors and Wi-Fi. SMARTCOMP 2018: 258-260 - [i3]Kazim Rifat Ozyilmaz, Arda Yurdakul:
Designing a blockchain-based IoT infrastructure with Ethereum, Swarm and LoRa. CoRR abs/1809.07655 (2018) - [i2]Kazim Rifat Özyilmaz, Mehmet Dogan, Arda Yurdakul:
IDMoB: IoT Data Marketplace on Blockchain. CoRR abs/1810.00349 (2018) - 2017
- [j11]Gorker Alp Malazgirt
, Arda Yurdakul
:
Prenaut: Design space exploration for embedded symmetric multiprocessing with various on-chip architectures. J. Syst. Archit. 72: 3-18 (2017) - [j10]Behzad Salami
, Gorker Alp Malazgirt, Oriol Arcas-Abella
, Arda Yurdakul, Nehir Sönmez
:
AxleDB: A novel programmable query processing platform on FPGA. Microprocess. Microsystems 51: 142-164 (2017) - [c18]Kazim Rifat Özyilmaz
, Arda Yurdakul:
Integrating low-power IoT devices to a blockchain-based infrastructure: work-in-progress. EMSOFT Companion 2017: 13:1-13:2 - 2016
- [c17]Salih Bayar
, Arda Yurdakul:
An efficient mapping algorithm on 2-D mesh Network-on-Chip with reconfigurable switches. DTIS 2016: 1-4 - [p1]Moritz Schmid, Christian Schmitt
, Frank Hannig
, Gorker Alp Malazgirt, Nehir Sönmez
, Arda Yurdakul, Adrián Cristal:
Big Data and HPC Acceleration with Vivado HLS. FPGAs for Software Programmers 2016: 115-136 - [i1]Gorker Alp Malazgirt, Deniz Candas, Arda Yurdakul:
Taxim: A Toolchain for Automated and Configurable Simulation for Embedded Multiprocessor Design. CoRR abs/1601.03341 (2016) - 2015
- [j9]Gorker Alp Malazgirt, Arda Yurdakul, Smaïl Niar:
Customizing VLIW processors from dynamically profiled execution traces. Microprocess. Microsystems 39(8): 656-673 (2015) - [j8]Salih Bayar
, Arda Yurdakul:
PFMAP: Exploitation of Particle Filters for Network-on-Chip Mapping. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2116-2127 (2015) - [c16]Gorker Alp Malazgirt, Bora Kiyan, Deniz Candas, Kamil Erdayandi, Arda Yurdakul:
Exploring Embedded Symmetric Multiprocessing with Various On-Chip Architectures. EUC 2015: 1-8 - [c15]Gorker Alp Malazgirt, Nehir Sönmez, Arda Yurdakul, Osman S. Unsal, Adrián Cristal
:
Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology (Abstract Only). FPGA 2015: 277 - [c14]Gorker Alp Malazgirt, Nehir Sönmez
, Arda Yurdakul, Adrián Cristal, Osman S. Unsal:
High Level Synthesis Based Hardware Accelerator Design for Processing SQL Queries. FPGAworld 2015: 27-32 - 2014
- [c13]Gorker Alp Malazgirt, Hasan Erdem Yantir, Arda Yurdakul, Smaïl Niar:
Application specific multi-port memory customization in FPGAs. FPL 2014: 1-4 - [c12]Gorker Alp Malazgirt, Arda Yurdakul, Smaïl Niar:
MIPT: Rapid exploration and evaluation for migrating sequential algorithms to multiprocessing systems with multi-port memories. HPCS 2014: 776-783 - [c11]Smaïl Niar, Arda Yurdakul, Osman S. Unsal, Tuna Tugcu
, Aziz C. Yücetürk:
A dynamically reconfigurable architecture for emergency and disaster management in ITS. ICCVE 2014: 479-484 - [c10]Hasan Erdem Yantir, Arda Yurdakul:
An Efficient Heterogeneous Register File Implementation for FPGAs. IPDPS Workshops 2014: 293-298 - 2013
- [c9]Hasan Erdem Yantir, Salih Bayar
, Arda Yurdakul:
Efficient Implementations of Multi-pumped Multi-port Register Files in FPGAs. DSD 2013: 185-192 - 2012
- [j7]Salih Bayar
, Arda Yurdakul:
A dynamically reconfigurable communication architecture for multicore embedded systems. J. Syst. Archit. 58(3-4): 140-159 (2012) - [j6]Dogan Fennibay, Arda Yurdakul, Alper Sen:
A Heterogeneous Simulation and Modeling Framework for Automation Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1642-1655 (2012) - [c8]Gorker Alp Malazgirt, Ender Culha, Alper Sen, I. Faik Baskaya, Arda Yurdakul:
A Verifiable High Level Data Path Synthesis Framework. DSD 2012: 397-404 - [c7]Ender Culha, Gorker Alp Malazgirt, I. Faik Baskaya, Alper Sen, Arda Yurdakul:
High-Level verifiable data-path Synthesis for DSP systems. SIU 2012: 1-4 - 2011
- [c6]Salih Bayar
, Mehmet Tükel, Arda Yurdakul:
A self-reconfigurable platform for general purpose image processing systems on low-cost spartan-6 FPGAs. ReCoSoC 2011: 1-9 - 2010
- [c5]Dogan Fennibay, Arda Yurdakul, Alper Sen:
Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems. CIT 2010: 1902-1909
2000 – 2009
- 2009
- [c4]Bayram Kurumahmut, Gökhan Kabukcu, Roza Ghamari, Arda Yurdakul:
Design automation model for application-specific processors on reconfigurable fabric. FDL 2009: 1-6 - [c3]Muhammet Erkoc, Arda Yurdakul:
Halftoning soft cores for low-cost digital displays. ISCIS 2009: 76-81 - 2008
- [j5]Mustafa Aktan, Arda Yurdakul, Günhan Dündar
:
An Algorithm for the Design of Low-Power Hardware-Efficient FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(6): 1536-1545 (2008) - 2007
- [j4]Gökhan Kabukcu, Arda Yurdakul:
Low-cost solution to on-line color filter array demosaicking. Int. J. Imaging Syst. Technol. 17(4): 232-243 (2007) - 2006
- [c2]Nehir Sönmez
, Arda Yurdakul:
SIxD: A Configurable Application-Specific SISD/SIMD Microprocessor Soft-Core. SoC 2006: 1-4 - 2005
- [j3]Arda Yurdakul:
Multiplierless implementation of 2-D FIR filters. Integr. 38(4): 597-613 (2005) - 2000
- [c1]Arda Yurdakul:
A synthesis tool for the multiplierless realization of FIR-based multirate DSP systems. ISCAS 2000: 69-72
1990 – 1999
- 1999
- [j2]Arda Yurdakul, Günhan Dündar
:
Statistical methods for the estimation of quantization effects in FIR-based multirate systems. IEEE Trans. Signal Process. 47(6): 1749-1753 (1999) - [j1]Arda Yurdakul, Günhan Dündar
:
Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions. J. VLSI Signal Process. 22(3): 163-172 (1999)
Coauthor Index
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-06-19 21:02 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint