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Journal Articles
- 2018
[j4]Eduardo Viegas
, Altair Olivo Santin, Luiz Oliveira, André França, Ricardo P. Jasinski, Volnei A. Pedroni:
A reliable and energy-efficient classifier combination scheme for intrusion detection in embedded systems. Comput. Secur. 78: 16-32 (2018)- 2017
- [j3]Eduardo Viegas, Altair Olivo Santin, André França, Ricardo P. Jasinski, Volnei A. Pedroni, Luiz S. Oliveira:
Towards an Energy-Efficient Anomaly-Based Intrusion Detection Engine for Embedded Systems. IEEE Trans. Computers 66(1): 163-177 (2017) - 2005
- [j2]Volnei A. Pedroni, Bruno U. Pedroni:
Output stage based high-resolution min/max and rank-order filters. IEEE Trans. Circuits Syst. II Express Briefs 52-II(1): 28-32 (2005) - 1997
- [j1]Gert Cauwenberghs, Volnei A. Pedroni:
A low-power CMOS analog vector quantizer. IEEE J. Solid State Circuits 32(8): 1278-1283 (1997)
Conference and Workshop Papers
- 2016
- [c20]Marcelo de Oliveira Rosa, Caio Cesar Viana da Silva, Wyllian Bezerra da Silva, Ricardo P. Jasinski, Volnei Antonio Pedroni, Alexandre de Almeida Prado Pohl:
Extraction of spatio-temporal features based on a hardware approach for a no-reference objective video quality metric. BMSB 2016: 1-4 - 2015
- [c19]André Luiz Pereira de França, Ricardo P. Jasinski, Paulo Cemin, Volnei A. Pedroni, Altair Olivo Santin:
The energy cost of network security: A hardware vs. software comparison. ISCAS 2015: 81-84 - [c18]Volnei A. Pedroni:
XOR-decomposition principle and its use to build a glitch-free maximum-speed arbitrary binary waveform generator and deglitcher. ISCAS 2015: 1834-1837 - [c17]Volnei A. Pedroni:
Introducing deglitched-feedback plus convergent encoding for straight hardware implementation of asynchronous finite state machines. ISCAS 2015: 2345-2348 - 2014
- [c16]André Luiz Pereira de França, Ricardo Pereira Jasinski, Volnei Antonio Pedroni, Altair Olivo Santin:
Moving Network Protection from Software to Hardware: An Energy Efficiency Analysis. ISVLSI 2014: 456-461 - [c15]Volnei A. Pedroni:
Detailed analysis of implementation options for timed finite state machines in hardware. MWSCAS 2014: 125-128 - 2012
- [c14]Eduardo Peters, Ricardo P. Jasinski, Volnei A. Pedroni, Jean M. Simao:
A new hardware coprocessor for accelerating Notification-Oriented applications. FPT 2012: 257-260 - 2011
- [c13]Volnei A. Pedroni, Ricardo P. Jasinski, Ricardo U. Pedroni:
A very efficient single-iteration oldest-out data sorter. ISCAS 2011: 2141-2144 - 2010
- [c12]Antonio Gortan, Ricardo P. Jasinski, Walter Godoy Jr., Volnei A. Pedroni:
Achieving near-MLD performance with soft information-set decoders implemented in FPGAs. APCCAS 2010: 312-315 - [c11]Volnei A. Pedroni, Ricardo P. Jasinski, Ricardo U. Pedroni:
Panning sorter: A minimal-size architecture for hardware implementation of 2D Data Sorting Coprocessors. APCCAS 2010: 923-926 - [c10]Rui A. L. de Cristo, Ricardo P. Jasinski, Volnei A. Pedroni:
Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous Counterpart. ReConFig 2010: 127-131 - [c9]Ricardo P. Jasinski, Volnei A. Pedroni, Antonio Gortan, Walter Godoy Jr.:
An Improved GF(2) Matrix Inverter with Linear Time Complexity. ReConFig 2010: 322-327 - 2006
- [c8]Volnei A. Pedroni:
Phase sampling: a new approach to the design of LF direct digital frequency synthesizers. ISCAS 2006 - [c7]Volnei A. Pedroni, Ricardo U. Pedroni:
PLL-less clock multiplier with self-adjusting phase symmetry. ISCAS 2006 - 2004
- [c6]Volnei A. Pedroni:
Compact Hamming-Comparator-based rank order filter for digital VLSI and FPGA implementations. ISCAS (2) 2004: 585-588 - [c5]Fabio Sousa, Volker Mauer, Neimar Duarte, Ricardo P. Jasinski, Volnei A. Pedroni:
Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs. ISCAS (1) 2004: 1088-1091 - 2003
- [c4]Volnei A. Pedroni:
Teaching Design-Oriented VHDL. MSE 2003: 6-7 - [c3]Volnei A. Pedroni:
High-Resolution WTA-MAX Circuit for Large Networks. VLSI 2003: 150-154 - 1994
- [c2]Gert Cauwenberghs, Volnei A. Pedroni:
A Charge-Based Parallel Analog Vector Quantizer. NIPS 1994: 779-787 - 1993
- [c1]Volnei A. Pedroni, Amnon Yariv:
Learning in the hypercube. ICNN 1993: 1168-1171
Editorship
- 2007
- [e1]Antonio Petraglia, Volnei A. Pedroni, Gert Cauwenberghs:
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007. ACM 2007, ISBN 978-1-59593-816-9 [contents]
Coauthor Index
aka: Ricardo Pereira Jasinski
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