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ORCIDManuel Saldaña
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Journal Articles
- 2014
[j5]Yuanxi Peng, Manuel Saldaña, Christopher A. Madill, Xiaofeng Zou, Paul Chow:
Benefits of Adding Hardware Support for Broadcast and Reduce Operations in MPSoC Applications. ACM Trans. Reconfigurable Technol. Syst. 7(3): 17:1-17:23 (2014)- 2012
- [j4]Manuel Saldaña, Arun Patel, Hao Jun Liu, Paul Chow:
Using Partial Reconfiguration and Message Passing to Enable FPGA-Based Generic Computing Platforms. Int. J. Reconfigurable Comput. 2012: 127302:1-127302:10 (2012) - 2010
- [j3]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Paul Chow, Ralph Wittig, Henry Styles, Andrew Putnam
:
MPI as a Programming Model for High-Performance Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. 3(4): 22:1-22:29 (2010) - 2009
- [j2]Manuel Saldaña, Emanuel Ramalho, Paul Chow:
A Message-Passing Hardware/Software Cosimulation Environment for Reconfigurable Computing Systems. Int. J. Reconfigurable Comput. 2009: 376232:1-376232:9 (2009) - 2007
- [j1]Manuel Saldaña, Lesley Shannon, Jia Shuo Yue, Sikang Bian, John Craig, Paul Chow:
Routability of Network Topologies in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 948-951 (2007)
Conference and Workshop Papers
- 2016
- [c16]Daniyal Liaqat, Silviu Jingoi, Eyal de Lara, Ashvin Goel, Wilson To, Kevin Lee, Italo De Moraes Garcia, Manuel Saldaña:
Sidewinder: An Energy Efficient and Developer Friendly Heterogeneous Architecture for Continuous Mobile Sensing. ASPLOS 2016: 205-215 - 2011
- [c15]Yuanxi Peng, Manuel Saldaña, Paul Chow:
Hardware Support for Broadcast and Reduce in MPSoC. FPL 2011: 144-150 - 2010
- [c14]Andrew W. H. House, Manuel Saldaña, Paul Chow:
Integrating High-Level Synthesis into MPI. FCCM 2010: 175-178 - [c13]Manuel Saldaña, Arun Patel, Hao Jun Liu, Paul Chow:
Using Partial Reconfiguration in an Embedded Message-Passing System. ReConFig 2010: 418-423 - 2009
- [c12]Daniel Le Ly, Manuel Saldaña, Paul Chow:
The challenges of using an embedded MPI for hardware-based processing nodes. FPT 2009: 120-127 - [c11]Paul Chow, Manuel Saldaña, Arun Patel, Christopher A. Madill:
Programming the Nallatech Xeon + multi-FPGA heterogeneous platform. Hot Chips Symposium 2009: 1-16 - 2008
- [c10]Daniel Nunes, Manuel Saldaña, Paul Chow:
A profiler for a heterogeneous multi-core multi-FPGA system. FPT 2008: 113-120 - [c9]Manuel Saldaña, Emanuel Ramalho, Paul Chow:
A Message-Passing Hardware/Software Co-simulation Environment to Aid in Reconfigurable Computing Design Using TMD-MPI. ReConFig 2008: 265-270 - [c8]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Henry Styles, Andrew Putnam, Ralph Wittig, Paul Chow:
MPI as an abstraction for software-hardware interaction for HPRCs. HPRCTA@SC 2008: 1-10 - 2006
- [c7]Arun Patel, Christopher A. Madill, Manuel Saldaña, Chris Comis, Régis Pomès, Paul Chow:
A Scalable FPGA-based Multiprocessor. FCCM 2006: 111-120 - [c6]Manuel Saldaña, Lesley Shannon, Paul Chow:
The routability of multiprocessor network topologies in FPGAs. FPGA 2006: 232 - [c5]Manuel Saldaña, Paul Chow:
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs. FPL 2006: 1-6 - [c4]Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow:
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification. FPL 2006: 1-6 - [c3]Manuel Saldaña, Daniel Nunes, Emanuel Ramalho, Paul Chow:
Configuration and Programming of Heterogeneous Multiprocessors on a Multi-FPGA System Using TMD-MPI. ReConFig 2006: 260-279 - [c2]Manuel Saldaña, Lesley Shannon, Paul Chow:
The routability of multiprocessor network topologies in FPGAs. SLIP 2006: 49-56 - 2005
- [c1]Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow:
Designing an FPGA SoC Using a Standardized IP Block Interface. FPT 2005: 341-342
Coauthor Index
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