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Lei Zhou 0014
Person information
- affiliation: Acela Microelectronics Company Ltd., Suzhou, China
- affiliation: Chinese Academy of Science (CAS), Institute of Microelectronics, Beijing, China
Other persons with the same name
- Lei Zhou — disambiguation page
- Lei Zhou 0001 — Qualcomm Technologies Inc., Santa Clara, CA, USA (and 1 more)
- Lei Zhou 0002 — Xidian University, Information Science Institute, State Key Laboratory of Integrated Service Networks, Xi'an, China
- Lei Zhou 0003
— Shanghai Jiao Tong University, Institute of Image Processing and Pattern Recognition, China - Lei Zhou 0004
— Nantong University, School of Electronics and Information, China (and 1 more) - Lei Zhou 0005
— Tianjin University, School of Electrical and Information Engineering, Nankai, China - Lei Zhou 0006 — Yangzhou University, College of Information Engineering, China (and 1 more)
- Lei Zhou 0007 — East China Normal University, Software Engineering Institute, Shanghai Key Laboratory of Trustworthy Computing, China
- Lei Zhou 0008
— Beihang University, School of Computer Science and Engineering, Beijing, China - Lei Zhou 0009
— Nanjing University of Information Science and Technology, Nanjing, China
- Lei Zhou 0010
— Southwest University of Science and Technology, School of Science, Mianyang, China - Lei Zhou 0011
— Apple Inc. (and 1 more) - Lei Zhou 0012
— Jiangsu University, Department of Electronic Engineering, Zhenjiang, China (and 1 more) - Lei Zhou 0013
— Nanjing Forestry University, College of Mechanical and Electronic Engineering, China (and 1 more) - Lei Zhou 0015
— Beijing University of Civil Engineering and Architecture, School of Geomatics and Urban Spatial Informatics, China (and 1 more) - Lei Zhou 0016
— Shanghai Jiao Tong University, School of Oceanography, China (and 2 more) - Lei Zhou 0017
![0000-0002-1940-8597 [0000-0002-1940-8597]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0018
![0000-0002-5904-2462 [0000-0002-5904-2462]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0019
![0000-0001-9998-430X [0000-0001-9998-430X]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0020
![0000-0002-5294-9299 [0000-0002-5294-9299]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0021
![0000-0001-8779-543X [0000-0001-8779-543X]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0022
![0000-0003-0658-8071 [0000-0003-0658-8071]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0023
![0000-0002-5027-1234 [0000-0002-5027-1234]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0024
![0000-0002-8837-3965 [0000-0002-8837-3965]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0025
![0000-0002-0678-8682 [0000-0002-0678-8682]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0026
![0000-0002-7566-4819 [0000-0002-7566-4819]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
- Lei Zhou 0027
![0000-0002-0089-4345 [0000-0002-0089-4345]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png)
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2020 – today
- 2025
[j13]Ben He, Xuan Guo, Hanbo Jia, Kai Sun, Lei Zhou, Zhijie Chen, Xinyu Liu:
A dither-based background calibration circuit for pipelined ADCs in 40 nm CMOS. IEICE Electron. Express 22(5): 20240726 (2025)
[j12]Xing Li
, Lei Zhou
, Xuan Guo
, Hanbo Jia
, Danyu Wu, Jin Wu, Xinyu Liu
:
A 25-GS/s 8-bit Current-Steering DAC With ADC-Based Duty-Cycle Detection in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 33(5): 1487-1491 (2025)- 2024
[j11]Xing Li
, Lei Zhou
, Xuan Guo
, Hanbo Jia
, Danyu Wu, Jin Wu, Xinyu Liu
:
A 16-Bit 5 GS/s DAC With Redundant-MSB-Based Digital Pre-Distortion Achieving SFDR >61 dBc Up to 2.4 GHz in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(12): 4829-4833 (2024)- 2021
[c6]Jian Luan, Danyu Wu, Xuqiang Zheng, Chen Cai, Linzhen Wu, Lei Zhou, Jin Wu, Xinyu Liu:
A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency. ESSCIRC 2021: 487-490
[c5]Chen Cai, Xuqiang Zheng, Yong Chen, Danyu Wu, Jian Luan, Lei Zhou, Jin Wu, Xinyu Liu:
A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS. ESSCIRC 2021: 527-530- 2020
[j10]Ming Luo, Danyu Wu, Weizhong Li, Tao Zeng, Lei Zhou, Lingheng Meng, Xiang Li
, Shaohua Yu:
100 Gb/s (4 × 25 Gb/s) real-time coherent UDWDM-PON with a large power budget. JOCN 12(2): A204-A213 (2020)
[j9]Xuqiang Zheng
, Fangxu Lv, Lei Zhou
, DanYu Wu, Jin Wu, Chun Zhang
, Woogeun Rhee
, Xinyu Liu:
Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators. IEEE J. Solid State Circuits 55(6): 1651-1664 (2020)
[j8]Xuqiang Zheng
, Hao Ding, Feng Zhao
, DanYu Wu, Lei Zhou
, Jin Wu, Fangxu Lv, Jianye Wang, Xinyu Liu:
A 50-112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS. IEEE J. Solid State Circuits 55(7): 1864-1876 (2020)
2010 – 2019
- 2019
[j7]Huasen Liu, DanYu Wu, Lei Zhou, Yinkun Huang, Jian Luan, Xuan Guo
, Dong Wang, Xuqiang Zheng, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS. IEICE Electron. Express 16(3): 20181079 (2019)
[j6]Huasen Liu, DanYu Wu, Lei Zhou, Jian Luan, Xuan Guo, Dong Wang, Jin Wu, Xinyu Liu:
A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm. IEICE Electron. Express 16(7): 20181150 (2019)
[j5]Dong Wang
, Lei Zhou, DanYu Wu, Chonghe Ma, Jinxin Xue, Xuan Guo
, Jian Luan, Huasen Liu, Jin Wu, Xinyu Liu:
An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 768-772 (2019)
[c4]Hao Ding, Xuqiang Zheng, DanYu Wu, Lei Zhou, Jin Wu, Fangxu Lv, Jianye Wang, Xinyu Liu:
A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS. ESSCIRC 2019: 195-198
[c3]DanYu Wu, Lei Zhou, Huasen Liu, Yinkun Huang, Jian Luan, Xuan Guo, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer. ISCAS 2019: 1-4
[c2]Ming Luo, Danyu Wu, Weizhong Li, Tao Zeng, Lei Zhou, Lingheng Meng, Zhixue He, Cai Li, Xiang Li:
Demonstration of Bidirectional Real-Time 100 Gb/s (4×25 Gb/s) Coherent UDWDM-PON with Power Budget of 44 dB. OFC 2019: 1-3- 2017
[j4]Xiaoge Zhu, DanYu Wu, Lei Zhou, Yinkun Huang, Jin Wu, Xinyu Liu:
A four-channel time-interleaved 30-GS/s 6-bit ADC in 0.18 μm SiGe BiCMOS technology. Sci. China Inf. Sci. 60(12): 129401 (2017)
[j3]Xiaoge Zhu, Lei Zhou, DanYu Wu, Jin Wu, Xinyu Liu:
A 400-MS/s 10-b 8 interleaved SAR ADC in 0.13 um CMOS. IEICE Electron. Express 14(5): 20170067 (2017)
[j2]Xiaoge Zhu, DanYu Wu, Lei Zhou, Chonghe Ma, Dandan Wang, Jian Luan, Yinkun Huang, Jin Wu, Xinyu Liu:
A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration. IEICE Electron. Express 14(11): 20170329 (2017)- 2016
[c1]Lei Zhou, Weizhong Li, DanYu Wu, Fan Jiang, Daojun Xue, Jin Wu, Xinyu Liu:
A 30Gsps 6bit DAC in SiGe BiCMOS technology. ICECS 2016: 37-40- 2014
[j1]Fan Jiang, DanYu Wu, Lei Zhou, Jin Wu, Zhi Jin, Xinyu Liu:
A 4-GS/s 8-bit two-channel time-interleaved folding and interpolating ADC. Sci. China Inf. Sci. 57(1): 1-6 (2014)
Coauthor Index
aka: Danyu Wu

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last updated on 2025-11-22 01:18 CET by the dblp team
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