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Books and Theses
- 2010
[b1]Thomas Schweizer:
Verfahren und Schaltkreis zur Ladungswiederverwendung in Schaltungen mit mehrfacher und abschaltbarer Spannungsversorgung. Eberhard Karls University of Tübingen, 2010, ISBN 978-3-86853-650-8, pp. 1-140
Journal Articles
- 2015
- [j4]Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz
, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang:
Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. 57(3): 149-158 (2015) - 2010
- [j3]Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel:
Charge Recycling in Voltage-Dithered Circuits. J. Low Power Electron. 6(2): 291-299 (2010) - 2009
- [j2]Julio A. de Oliveira Filho, Stephan Masekowsky, Thomas Schweizer, Wolfgang Rosenstiel:
CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable Arrays. IEEE Trans. Very Large Scale Integr. Syst. 17(9): 1247-1259 (2009) - 2007
- [j1]Tobias Oppold, Thomas Schweizer, Julio A. de Oliveira Filho, Sven Eisenhardt, Wolfgang Rosenstiel:
CRC - Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC - Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen). it Inf. Technol. 49(3): 157- (2007)
Conference and Workshop Papers
- 2020
- [c21]Thomas Schweizer, Vassilis Zafeiris, Marios Fokaefs, Michalis Famelis:
Can Refactorings Indicate Design Tradeoffs? SCAM 2020: 70-74 - 2016
- [c20]Konstantin Lübeck, David Morgenstern, Thomas Schweizer, Dustin Peterson, Wolfgang Rosenstiel, Oliver Bringmann:
Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs. MBMV 2016: 46-58 - [c19]Thomas Schweizer, Murat Simsek, Oliver Bringmann, Wolfgang Rosenstiel:
Eine Tcl-basierte Methode zur Fehlerinjektion und Fehlereffektsimulation/-emulation auf Xilinx-FPGAs. MBMV 2016: 59-71 - 2014
- [c18]Simon Schulz, Oliver Bringmann, Thomas Schweizer, Wolfgang Rosenstiel:
Rotated parallel mapping: A novel approach for mapping data parallel applications on CGRAs. ReConFig 2014: 1-6 - 2013
- [c17]Thomas Schweizer, Dustin Peterson, Johannes Maximilian Kühn, Tommy Kuhn, Wolfgang Rosenstiel:
A Fast and Accurate FPGA-Based Fault Injection System. FCCM 2013: 236 - [c16]Dustin Peterson, Oliver Bringmann, Thomas Schweizer, Wolfgang Rosenstiel:
StML: Bridging the gap between FPGA design and HDL circuit description. FPT 2013: 278-285 - [c15]Johannes Maximilian Kühn, Thomas Schweizer, Dustin Peterson, Tommy Kuhn, Wolfgang Rosenstiel:
Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection. FPT 2013: 462-465 - [c14]Thomas Schweizer, Wolfgang Rosenstiel, Luigi Vaz Ferreira, Marcus Ritt:
Timing error handling on CGRAs. ReConFig 2013: 1-6 - 2012
- [c13]Thomas Schweizer, Anja Küster, Sven Eisenhardt, Tommy Kuhn, Wolfgang Rosenstiel:
Using Run-Time Reconfiguration to Implement Fault-Tolerant Coarse Grained Reconfigurable Architectures. IPDPS Workshops 2012: 320-327 - 2011
- [c12]Sven Eisenhardt, Anja Küster, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel:
Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures. DFT 2011: 382-388 - [c11]Thomas Schweizer, Philipp Schlicker, Sven Eisenhardt, Tommy Kuhn, Wolfgang Rosenstiel:
Low-Cost TMR for Fault-Tolerance on Coarse-Grained Reconfigurable Architectures. ReConFig 2011: 135-140 - [c10]Sven Eisenhardt, Anja Küster, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel:
Runtime-datapath-remapping for fault-tolerant coarse-grained reconfigurable architectures. ReCoSoC 2011: 1-2 - 2009
- [c9]Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel:
Low Energy Voltage Dithering in Dual VDD Circuits. PATMOS 2009: 237-246 - [c8]Sven Eisenhardt, Thomas Schweizer, Andreas Bernauer, Tommy Kuhn, Wolfgang Rosenstiel:
Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures. ReConFig 2009: 12-17 - 2008
- [c7]Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jürgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jürgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
Coarse-grained reconfiguration. FPL 2008: 349 - [c6]Sven Eisenhardt, Tobias Oppold, Thomas Schweizer, Wolfgang Rosenstiel:
Optimizing Partial Reconfiguration of Multi-context Architectures. ReConFig 2008: 67-72 - 2007
- [c5]Thomas Schweizer, Tobias Oppold, Julio A. de Oliveira Filho, Sven Eisenhardt, Kai Blocher, Wolfgang Rosenstiel:
Exploiting Slack Time in Dynamically Reconfigurable Processor Architectures. FPT 2007: 381-384 - 2006
- [c4]Julio A. de Oliveira Filho, Thomas Schweizer, Tobias Oppold, Tommy Kuhn, Wolfgang Rosenstiel:
Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain. ReConFig 2006: 71-77 - 2005
- [c3]Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel, Urs Kanus, Wolfgang Straßer:
Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures. FPL 2005: 185-190 - 2004
- [c2]C. Schulz-Key, Markus Winterholer, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel:
Object-oriented modeling and synthesis of SystemC specifications. ASP-DAC 2004: 238-243 - [c1]Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel:
A Design Environment for Processor-Like Reconfigurable Hardware. PARELEC 2004: 171-176
Parts in Books or Collections
- 2010
- [p1]Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel:
Evaluation and Design Methods for Processor-Like Reconfigurable Architectures. Dynamically Reconfigurable Systems 2010: 95-116
Coauthor Index
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