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Carlos Silva Cárdenas
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2020 – today
- 2023
- [j1]Juan Ochoa-Aldeán, Carlos Silva Cárdenas:
A New Linear Model for the Calculation of Routing Metrics in 802.11s Using ns-3 and RStudio. Comput. 12(9): 172 (2023) - [c13]Jair Pérez Ramírez, Carlos Silva Cárdenas:
Electrical and Physical Evaluation of Logic Network Generation Methods for SCCG. MWSCAS 2023: 147-151 - 2021
- [c12]Igor Mendez Cabana, Carlos Silva Cárdenas:
A Low-Power Elliptic Curve Processor for WISP. NEWCAS 2021: 1-4 - 2020
- [e1]Carolina Metzler, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva Cárdenas, Ricardo Reis:
VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 586, Springer 2020, ISBN 978-3-030-53272-7 [contents]
2010 – 2019
- 2019
- [c11]Haris Chaudhry, Mario Raffo-Jara, Carlos Silva Cárdenas, Cristopher Villegas:
A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation. LASCAS 2019: 157-160 - [c10]Frank Plasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara, Carlos Silva Cárdenas:
A Flexible UVM-Based Verification Framework Reusable with Avalon, AHB, AXI and Wishbone Bus Interfaces for an AES Encryption Module. LATS 2019: 1-4 - [c9]Kevin A. Cáceres Albinagorta, Calebe Conceição, Carlos Silva Cárdenas, Ricardo A. L. Reis:
Exploring area and total wirelength using a cell merging technique. VLSI-SoC 2019: 329-334 - 2018
- [c8]Ruth G. Barba, Marcelo Criollo, Norma Aimacana, Carlos Manosalvas, Carlos Silva Cárdenas:
QoS Policies to Improve Performance in Academic Campus and SDN Networks. LATINCOM 2018: 1-6 - [c7]Frank Plasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara, Carlos Silva Cárdenas:
Alternative functional verification methodology for low and medium level designs (Applied to an AES encryption module). LATS 2018: 1-4 - [c6]Frank Plasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara, Carlos Silva Cárdenas:
Robust Functional Verification Framework Based in UVM Applied to an AES Encryption Module. NGCAS 2018: 194-197 - 2017
- [c5]Jesus Marco Vivas Ruiz, Carlos Silva Cárdenas, Jose Luis Muñoz-Tapia:
Implementation and testing of IPv6 transition mechanisms. LATINCOM 2017: 1-6 - 2016
- [c4]Jorge Soto Leon, Carlos Silva Cárdenas, Ernesto Cristopher Villegas Castillo:
A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation. ICECS 2016: 708-711 - [c3]Julio Saldaña Pumarica, Carlos Silva Cárdenas, Emilio Del-Moral-Hernandez:
A CMOS implementation of the discrete time nonlinear energy operator based on a transconductor-squarer circuit. LASCAS 2016: 395-398 - 2012
- [c2]Carlos Gañán, Jose L. Muñoz, Oscar Esparza, Jorge Mata-Díaz, Juanjo Alins, Carlos Silva Cárdenas, Gumercindo Bartra-Gardini:
RAR: Risk Aware Revocation Mechanism for Vehicular Networks. VTC Spring 2012: 1-5
2000 – 2009
- 2007
- [c1]Julio Saldaña Pumarica, Emílio Del Moral Hernandez, Carlos Silva Cárdenas:
CMOS encoder for scale-independent pattern recognition. SBCCI 2007: 241-244
Coauthor Index
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