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ORCIDNishit Ashok Kapadia
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Journal Articles
- 2017
[j4]Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha:
ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-Based Chip Multiprocessors. IEEE Trans. Multi Scale Comput. Syst. 3(2): 72-85 (2017)- [j3]Nishit Ashok Kapadia, Sudeep Pasricha
:
A Runtime Framework for Robust Application Scheduling With Adaptive Parallelism in the Dark-Silicon Era. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 534-546 (2017) - 2016
- [j2]Nishit Ashok Kapadia, Sudeep Pasricha:
A System-Level Cosynthesis Framework for Power Delivery and On-Chip Data Networks in Application-Specific 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 3-16 (2016) - 2012
- [j1]Nishit Ashok Kapadia, Sudeep Pasricha:
A framework for low power synthesis of interconnection networks-on-chip with multiple voltage islands. Integr. 45(3): 271-281 (2012)
Conference and Workshop Papers
- 2016
- [c10]Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha:
CHARM: A checkpoint-based resource management framework for reliable multicore computing in the dark silicon era. ICCD 2016: 201-208 - 2015
- [c9]Nishit Ashok Kapadia, Sudeep Pasricha:
VARSHA: variation and reliability-aware application scheduling with adaptive parallelism in the dark-silicon era. DATE 2015: 1060-1065 - [c8]Shoumik Maiti, Nishit Ashok Kapadia, Sudeep Pasricha:
Process variation aware dynamic power management in multicore systems with extended range voltage/frequency scaling. MWSCAS 2015: 1-4 - [c7]Nishit Ashok Kapadia, Venkata Yaswanth Raparti, Sudeep Pasricha:
ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-based Chip Multiprocessors. NOCS 2015: 31:1-31:2 - 2014
- [c6]Nishit Ashok Kapadia, Sudeep Pasricha:
PRATHAM: A power delivery-aware and thermal-aware mapping framework for parallel embedded applications on 3D MPSoCs. ICCD 2014: 525-528 - [c5]Nishit Ashok Kapadia, Sudeep Pasricha:
Process Variation Aware Synthesis of Application-Specific MPSoCs to Maximize Yield. VLSID 2014: 270-275 - 2013
- [c4]Nishit Ashok Kapadia, Sudeep Pasricha:
A co-synthesis methodology for power delivery and data interconnection networks in 3D ICs. ISQED 2013: 73-79 - [c3]Nishit Ashok Kapadia, Sudeep Pasricha:
VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands. ISQED 2013: 603-610 - 2012
- [c2]Nishit Ashok Kapadia, Sudeep Pasricha:
A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands. VLSI Design 2012: 262-267 - 2011
- [c1]Nishit Ashok Kapadia, Sudeep Pasricha:
VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip. ACM Great Lakes Symposium on VLSI 2011: 31-36
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