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2010 – 2019
- 2018
[c3]Kuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Jia-Hung Peng, Yuan-Hua Chu:
MORAS: An energy-scalable system using adaptive voltage scaling. VLSI-DAT 2018: 1-4- 2014
- [j4]Shien-Chun Luo, Ching-Ji Huang, Yuan-Hua Chu:
A Wide-Range Level Shifter Using a Modified Wilson Current Mirror Hybrid Buffer. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(6): 1656-1665 (2014) - [j3]Shien-Chun Luo, Kuo-Chiang Chang, Ming-Pin Chen, Ching-Ji Huang, Yi-Fang Chiu, Po-Hsun Chen, Liang-Chia Cheng, Chih-Wei Liu, Yuan-Hua Chu:
Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells. IEEE Trans. Circuits Syst. II Express Briefs 61-II(12): 947-951 (2014) - [c2]Kuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Chih-Wei Liu, Yuan-Hua Chu, Shyh-Jye Jou:
An ultra-low voltage hearing aid chip using variable-latency design technique. ISCAS 2014: 2543-2546 - 2013
- [j2]Shien-Chun Luo, Ching-Ji Huang, Yuan-Hua Chu:
An Adaptive Pulse-Triggered Flip-Flop for a High-Speed and Voltage-Scalable Standard Cell Library. IEEE Trans. Circuits Syst. II Express Briefs 60-II(10): 677-681 (2013)
2000 – 2009
- 2009
- [j1]Chin-Cheng Kuo, Meng-Jung Lee, Chien-Nan Jimmy Liu, Ching-Ji Huang:
Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(6): 1160-1172 (2009) - 2007
- [c1]Chung-Yu Chang, Wei-Bin Yang, Ching-Ji Huang, Cheng-Hsing Chien:
New Power Gating Structure with Low Voltage Fluctuations by Bulk Controller in Transition Mode. ISCAS 2007: 3740-3743
Coauthor Index
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