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2nd DELTA 2004: Perth, Australia
- 2nd IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), 28-30 January 2004, Perth, Australia. IEEE Computer Society 2004, ISBN 0-7695-2081-2

DfT and BIST
- Raimund Ubar, Maksim Jenihhin

:
Hybrid BIST Optimization for Core-based Systems with Test Pattern Broadcasting. 3-8 - Hans G. Kerkhoff, Arun A. Joseph:

Testability Issues in Superconductor Electronic. 9-14 - N. Venkateswaran, Krishna Bharath:

Frequency Domain Testing of General Purpose Processors at the Instruction Execution Level. 15-22
Signal & Image Processing Systems
- Donald G. Bailey

, Warwick Allen, Serge N. Demidenko
:
Spectral Warping Revisited. 23-28 - Xiaoyun Deng, Chip-Hong Chang, Erwin Brandle:

A New Method for Eye Extraction from Facial Image. 29-34 - Amine Bermak

, Farid Boussaïd
, Abdesselam Bouzerdoum
:
A New read-out circuit for low power current and voltage mediated integrating CMOS imager. 35-40 - Gagandeep S. Sandha, Pawan K. Singh, Neha Oberoi, D. Nagchoudhuri:

Phase Correlations in Human EEG Signal: A Case Study. 41-46
Special Session on Opto-VLSI and MicroPhotonics
- Selam T. Ahderom, Mehrdad Raisi, Kamal E. Alameh

, Kamran Eshraghian:
Testing and Analysis of Computer Generated Holograms for MicroPhotonic Devices. 47-52 - Steven Hinckley, Paul V. Jansz-Drávetzky, Kamran Eshraghian:

Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode Arrays. 53-58 - Mehrdad Raisi, Selam T. Ahderom, Kamal E. Alameh

, Kamran Eshraghian:
Dynamic MicroPhotonic WDM Equalizer. 59-62 - Kamal E. Alameh

, Selam T. Ahderom, Mehrdad Raisi, Rong Zheng
, Kamran Eshraghian:
MicroPhotonic Reconfigurable RF Signal Processor. 63-70
Special Session on FPGA
- Natascha Petry Ligocki, Achim Rettberg, Mauro Cesar Zanella, Andreas Hennig, André Luiz de Freitas Francisco:

Towards a Modular Communication System for FPGAs. 71-76 - J. Chandran, R. Kaluri, Jugdutt Singh, Viktor Öwall, Ronny Veljanovski:

Xilinx Virtex II Pro Implementation of a Reconfigurable UMTS Digital Channel Filter. 77-82 - Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:

High Quality TPG for Delay Faults in Look-Up Tables of FPGAs. 83-88 - K. Wang, Jugdutt Singh, Mike Faulkner

:
FPGA Implementation of an OFDM-WLAN Synchronizer. 89-96
Analog & Mixed-Signal Design
- Alain Vachoux, Christoph Grimm

, Karsten Einwich:
Towards Analog and Mixed-Signal SOC Design with SystemC-AMS. 97-102 - Aleksandar Stojcevski, Jugdutt Singh, Aladin Zayegh:

CMOS ADC with Reconfigurable Properties for a Cellular Handset. 103-107 - Alistair Kitchen, Abdesselam Bouzerdoum

, Amine Bermak
:
Time Domain Analogue to Digital Conversion in a Digital Pixel Sensor Array. 108-114
Real-Time Systems
- Luis Alejandro Cortés, Petru Eles, Zebo Peng:

Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft Tasks. 115-120 - Yao Li

:
The Slack Sharing Server for Embedded Microcontrollers. 121-125 - K. T. Gribbon, Donald G. Bailey

:
A Novel Approach to Real-time Bilinear Interpolation. 126-134
Special Session on Education in Electronics
- Marie-Lise Flottes, Yves Bertrand, Luz Balado, Emili Lupon

, Anton Biasizzo, Franc Novak, Stefano Di Carlo
, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich:
Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. 135-139 - James O. Hamblen, Tyson S. Hall:

Engaging Undergraduate Students with Robotic Design Projects. 140-145 - Ton J. Mouthaan:

A Case Study of a Microsystems MSc Curriculum. 146-148 - Bernard Courtois:

Infrastructures for Education, Research and Industry in Microelectronics - A review. 149-156
Communications 1
- Xiaoyong Yang:

A Feasibility Study Of UML In The Software Defined Radio. 157-162 - Rudolf Volner, Lubomir Pousek:

BioMedical Intelligence Security Home Network- ATM/IP CATV Network. 163-168 - Peter J. Green, Desmond P. Taylor:

Dynamic Channel Order Estimation Algorithm. 169-173 - Xiaoyong Yang:

An Enhanced SOFM Method for Automatic Recognition and Identification of Digital Modulations. 174-182
Current Testing
- Masaki Hashizume, Tetsuo Akita, Hiroyuki Yotsuyanagi, Takeomi Tamesada:

CMOS Open Fault Detection by Appearance Time of Switching Supply Current. 183-188 - Isao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada:

Practical Fault Coverage of Supply Current Tests for Bipolar ICs. 189-194 - Scott Thomas, Rafic Z. Makki, Sai Kishore Vavilala:

Measurement and Analysis of Physical Defects for Dynamic Supply Current Testing. 195-202
Special Session on Opto-VLSI and MicroPhotonics 2
- Selam T. Ahderom, Mehrdad Raisi, Kamal E. Alameh

, Kamran Eshraghian:
Reconfigurable MicroPhotonic Add/Drop Multiplexer Architecture. 203-207 - Kamal E. Alameh

, Kamran Eshraghian, Selam T. Ahderom, Mehrdad Raisi, Mike Myung-Ok Lee, Rainer Michalzik:
Integrated MicroPhotonic Broadband Smart Antenna Beamformer. 208-212 - Zhenglin Wang, Kamal E. Alameh, Selam T. Ahderom, Rong Zheng

, Mehrdad Raisi, Kamran Eshraghian:
Novel Integrated Optical Router for MicroPhotonic Switching. 213-218
Advanced Design Solutions
- Paolo Ienne, Ajay Kumar Verma:

Arithmetic Transformations to Maximise the Use of Compressor Trees. 219-224 - Andrzej Rucinski, Artur Skrygulec, Khrystyna Pysareva, Jakub Mocny:

Microsystem Development Using the TQM Design Methodology. 225-230 - Fabrizio Ferrandi

, Pier Luca Lanzi
, Donatella Sciuto
, Mara Tanelli
:
System-level metrics for hardware/software architectural mapping. 231-236 - Adriel Cheng, Atanas N. Parashkevov, Cheng-Chew Lim

:
Coverage Measurement for Software Application Level Verification using Symbolic Trajectory Evaluation Techniques. 237-244
Digital Systems and Circuits
- Florian Dittmann, Achim Rettberg, Thomas Lehmann, Mauro Cesar Zanella:

Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial Architecture. 245-250 - Chul Kim, Mike Myung-Ok Lee, Byung-Lok Cho, Kamran Eshraghian:

SOC-B Design and Testing Technique of IS-95C CDMA Transmitter for Measurement of Electric Field Intensity using FPGA and ASIC. 251-254 - Zhi Ye, Chip-Hong Chang:

Local Search Method for FIR Filter Coefficients Synthesis. 255-260 - Huaping Liu, Chengde Han:

Optimization of Multipartite Table Methods to Approximate the Elementary Functions. 261-268
Scan Testing
- Hiroyuki Yotsuyanagi, Toshimasa Kuchii, Shigeki Nishikawa, Masaki Hashizume, Kozo Kinoshita:

On Configuring Scan Trees to Reduce Scan Shifts based on a Circuit Structure. 269-274 - Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre:

On Using Test Vector Differences for Reducing Test Pin Numbers. 275-280 - Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi:

Scan Test of IP Cores in an ATE Environment. 281-286 - Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel

:
Design of Routing-Constrained Low Power Scan Chains. 287-294
Application Specific Circuits and Systems
- Jie Sun, Geok Soon Hong

, Mustafizur Rahman, Yoke San Wong:
The Application of Nonstandard Support Vector Machine in Tool Condition Monitoring System. 295-300 - U. Sabura Banu

, G. Uma, M. A. Panneerselvam:
Artificial Controlled Neural Network Emulator for Quasi Resonant Converter. 301-305 - Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada:

A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. 306-311 - Gerald Esch Jr., Tom Chen:

Design of CMOS IO Drivers with Less Sensitivity to Process, Voltage, and Temperature Variations. 312-320
Fault Tolerance
- Melvin A. Breuer:

Determining error rate in error tolerant VLSI chips. 321-326 - Babak Rahbaran, Andreas Steininger

, Thomas Handl:
Built-in Fault Injection in Hardware - The FIDYCO Example. 327-332 - N. Venkateswaran, V. Barath Kumar, R. Raghavan, R. Srinivas, S. Subramanian, V. Balaji, Venkataraman Mahalingam, T. L. Rajaprabhu:

Crosstalk Fault Tolerant Processor Architecture - A Power Aware Design. 333-340
Open Architecture Test System
- Rochit Rajsuman:

An Overview of the Open Architecture Test System. 341-348
Analog Design Techniques
- S. V. Gopalaiah, A. P. Shivaprasad:

Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing. 349-354 - Daniela De Venuto

, Marija Blagojevic, Maher Kayal:
Microelectronic System for Hall Sensor Power Measurements. 355-359 - Hai Phuong Le, Aladin Zayegh, Jugdutt Singh:

Noise Analysis of a Reduced Complexity Pipeline Analog-to-Digital Converter. 360-368
Communications 2
- Min Jiang, Bing Yang, Xinan Wang, Tianyi Zhang:

SW/HW Co-design of a Java-based ASIP for Pervasive Computing in Mobile Applications. 369-371 - Soumendu Bhattacharya, Ganesh Srinivasan, Sasikumar Cherubal, Abhijit Chatterjee:

Test Time Reduction for ACPR Measurement of Wireless Transceivers Using Periodic Bit-Stream Sequences. 372-377 - V. Vibhute, David Fitrio, Jugdutt Singh, Aladin Zayegh, Aleksandar Stojcevski:

A Tunable VCO for Multistandard Mobile Receiver. 378-386
Special Session on Opto-VLSI and MicroPhotonics 3
- Kamal E. Alameh

, Abdesselam Bouzerdoum
, Selam T. Ahderom, Mehrdad Raisi, Kamran Eshraghian, X. Zhao, Rong Zheng
, Zhenglin Wang:
Integrated MicroPhotonic Wideband RF Interference Mitigation Filter. 387-390 - Mehrdad Raisi, Selam T. Ahderom, Kamal E. Alameh

, Kamran Eshraghian:
Multi-band MicroPhotonic Tunable Optical Filter. 391-394 - Seung-Min Lee, Stefan Lachowicz, David Lucas, A. M. Rassau, Kamran Eshraghian, Mike Myung-Ok Lee, Kamal E. Alameh:

A Novel Design of Beam Steering n-phase OPTO-ULSI Processor for IIPS. 395-402
Poster Papers
- Ganesh Kothapalli

:
Excitation Modes and Transient Response of a Winner-take-all Circuit. 403-406 - Zhi Ye, Ravi Kumar Satzoda, Udit Sharma, Naveen Nazimudeen, Chip-Hong Chang:

Performance Evaluation of Direct Form FIR Filter with Merged Arithmetic Architecture. 407-409 - David Murfett:

The Challenge of Testing RFID Integrated Circuits . 410-412 - Abdil Rashid Mohamed, Zebo Peng, Petru Eles:

A Wiring-Aware Approach to Minimizing Built-in Self-Test Overhead. 413-415 - Shyue-Kung Lu, Mau-Jung Lu:

Enhancing Delay Fault Testability for FIR Filters Based on Realistic Sequential Cell Fault Model. 416-418 - Vineetha Kalavally, Nader Bin Kamrani:

Simulation of a Communications System - A Designer's Perspective. 419-421 - Andrea S. Brogna, Franco Bigongiari, Fabrizio Bertuccelli, Walter Errico, Simone Giovannetti, Egidio Pescari, Roberto Saletti

:
SEU Protected CPU for Slow Control on Space Vehicles. 422-424 - Kyu Hwan Seol, Yeong Seog Lim:

Implementation of Headset Using Bluetooth. 425-427 - Zhiyi Fang, Shuhua Li, Weiguo Xu, Qingkai Meng:

SCS: A Workflow_Based Smart Control System. 428-430 - Giovanni Agosta

, Francesco Bruschi, Donatella Sciuto
:
Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware. 431-433 - Yu-Ting Pai, Yu-Kumg Chen:

The Fastest Carry Lookahead Adder. 434-436 - T. Salim, John C. Devlin, Jim Whittington:

Analog Conversion for FPGA Implementation of the TIGER Transmitter using a 14 bit DAC. 437-439 - Shing Tenqchen, Ying-Haw Shu, Ming-Chang Sun, Wu-Shiung Feng:

Blind Signal Extraction Algorithm for the License Plate Matching of Vehicle Positioning System. 440-442

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