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ISPD 2024: Taipei, Taiwan
- Iris Hui-Ru Jiang, Gracieli Posser:

Proceedings of the 2024 International Symposium on Physical Design, ISPD 2024, Taipei, Taiwan, March 12-15, 2024. ACM 2024
Session 1: Opening Session and First Keynote
- Ruchir Puri

:
Engineering the Future of IC Design with AI. 1
Session 2: Partitioning and Clustering
- Rongjian Liang

, Anthony Agnesina
, Haoxing Ren
:
MedPart: A Multi-Level Evolutionary Differentiable Hypergraph Partitioner. 3-11 - Shuo Yin

, Wenqian Zhao
, Li Xie
, Hong Chen
, Yuzhe Ma
, Tsung-Yi Ho
, Bei Yu
:
FuILT: Full Chip ILT System With Boundary Healing. 13-20 - Yen-Yu Chen

, Hao-Yu Wu
, Iris Hui-Ru Jiang
, Cheng-Hong Tsai
, Chien-Cheng Wu
:
Slack Redistributed Register Clustering with Mixed-Driving Strength Multi-bit Flip-Flops. 21-29
Session 3: Timing Optimization
- Wuxi Li

, Yuji Kukimoto
, Grégory Servel, Ismail Bustany
, Mehrdad E. Dehkordi
:
Calibration-Based Differentiable Timing Optimization in Non-linear Global Placement. 31-39 - Wei-Chen Tai

, Min-Hsien Chung
, Iris Hui-Ru Jiang
:
Novel Airgap Insertion and Layer Reassignment for Timing Optimization Guided by Slack Dependency. 41-49 - Tsung-Wei Huang

, Boyang Zhang
, Dian-Lun Lin
, Cheng-Hsiang Chiu
:
Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System. 51-59
Session 4: Panel on EDA Challenges at Advanced Technology Nodes
- Tung-Chieh Chen

:
Introduction to the Panel on EDA Challenges at Advanced Technology Nodes. 61 - Andrew B. Kahng

:
Panel Statement: EDA Needs at Advanced Technology Nodes. 63 - Zhuolun He

, Bei Yu
:
Large Language Models for EDA: Future or Mirage? 65-66 - Eugene Liu

:
PANEL: EDA Challenges at Advanced Technology Nodes A. 67 - Guang-Wan Liao

:
PANEL: EDA Challenges at Advanced Technology Nodes B. 69 - I-Lun Tseng

:
Challenges in Floorplanning and Macro Placement for Modern SoCs. 71-72 - Keh-Jeng Chang

:
PANEL: EDA Challenges at Advanced Technology Nodes C. 73
Session 5: 3D ICs
- Siting Liu

, Jiaxi Jiang
, Zhuolun He
, Ziyi Wang
, Yibo Lin
, Bei Yu
, Martin D. F. Wong:
Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs. 75-82 - Wang-Tyng Lay

:
Unified 3D-IC Multi-Chiplet System Design Solution. 83 - Jun-Ho Choy

, Stéphane Moreau
, Catherine Brunet-Manquat
, Valeriy Sukharev
, Armen Kteyan
:
Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects. 85-90 - Wen-Hao Liu

, Anthony Agnesina
, Haoxing Mark Ren
:
Challenges for Automating PCB Layout. 91-92
Session 6: Artificial Intelligence and Machine Learning
- Hao-Hsiang Hsiao

, Yi-Chen Lu
, Pruek Vanna-Iampikul
, Sung Kyu Lim
:
FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning. 93-101 - Suwan Kim

, Hyunbum Park
, Kyeonghyeon Baek
, Kyumyung Choi
, Taewhan Kim
:
Methodology of Resolving Design Rule Checking Violations Coupled with Fully Compatible Prediction Model. 103-111 - Erick Chao

:
AI for EDA/Physical Design: Driving the AI Revolution: The Crucial Role of 3D-IC. 113 - Piyush Verma

:
DSO.ai - A Distributed System to Optimize Physical Design Flows. 115-116 - Andrew B. Kahng

:
Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design. 117-124
Session 7: Second Keynote
- Yao-Wen Chang

:
Physical Design Challenges in Modern Heterogeneous Integration. 125-134
Session 8: Analog
- Jürgen Scheible

:
Fundamental Differences Between Analog and Digital Design Problems - An Introduction. 135-136 - Andreas Krinke

, Robert Fischbach
, Jens Lienig
:
Layout Verification Using Open-Source Software. 137-142 - Mark Po-Hung Lin

, Chou-Chen Lee
, Yi-Chao Hsieh
:
Reinforcement Learning or Simulated Annealing for Analog Placement? A Study based on Bounded-Sliceline Grids. 143-150
Session 9: Placement
- Teng-Ping Huang

, Shao-Yun Fang
:
Practical Mixed-Cell-Height Legalization Considering Vertical Cell Abutment Constraint. 151-159 - Yu Zhang

, Yuan Pu
, Fangzhou Liu
, Peiyu Liao
, Kai-Yuan Chao
, Keren Zhu
, Yibo Lin
, Bei Yu
:
Multi-Electrostatics Based Placement for Non-Integer Multiple-Height Cells. 161-168 - Yuan Pu

, Tinghuan Chen
, Zhuolun He
, Chen Bai
, Haisheng Zheng
, Yibo Lin
, Bei Yu
:
IncreMacro: Incremental Macro Placement Refinement. 169-176 - Jai-Ming Lin

, You-Yu Chang
, Wei-Lun Huang
:
Timing-Driven Analytical Placement According to Expected Cell Distribution Range. 177-184
Session 10: Standard Cell, Routability, and IR drop
- Bing-Xun Song

, Ting Xin Lin
, Yih-Lang Li
:
Routability Booster " Synthesize a Routing Friendly Standard Cell Library by Relaxing BEOL Resources. 185-193 - Chia-Tung Ho

, Ajay Chandna
, David Guan
, Alvin Ho
, Minsoo Kim
, Yaguang Li
, Haoxing Ren
:
Novel Transformer Model Based Clustering Method for Standard Cell Design Automation. 195-203 - Chien-Pang Lu

, Iris Hui-Ru Jiang
, Chung-Ching Peng
, Mohd Mawardi Mohd Razha
, Alessandro Uber
:
Power Sub-Mesh Construction in Multiple Power Domain Design with IR Drop and Routability Optimization. 205-212
Session 11: Thermal Analysis and Packaging
- Alex Hung

:
Introduction of 3D IC Thermal Analysis Flow. 213 - Jim Chang

:
3Dblox: Unleash the Ultimate 3DIC Design Productivity. 215 - Hung-Ming Chen

:
Enabling System Design in 3D Integration: Technologies and Methodologies. 217
Session 12: Lifetime Achievement Session
- Jason Cong

:
Scheduling and Physical Design. 219-225 - Evangeline F. Y. Young

:
Accelerating Physical Design from 1 to N. 227 - Ting-Chi Wang

:
Pioneering Contributions of Professor Martin D. F. Wong to Automatic Floorplan Design. 229 - Martin D. F. Wong

:
ISPD 2024 Lifetime Achievement Award Bio. 231
Session 13: Third Keynote
- Bor-Sung Liang

:
Computing Architecture for Large-Language Models (LLMs) and Large Multimodal Models (LMMs). 233-234
Session 14: Quantum and Superconducting Circuits
- Zi-Hao Guo

, Ting-Chi Wang
:
SMT-Based Layout Synthesis Approaches for Quantum Circuits. 235-243 - Wei-Hsiang Tseng

, Yao-Wen Chang
, Jie-Hong Roland Jiang
:
Satisfiability Modulo Theories-Based Qubit Mapping for Trapped-Ion Quantum Computing Systems. 245-253 - Bing-Huan Wu

, Wai-Kei Mak
:
Optimization for Buffer and Splitter Insertion in AQFP Circuits with Local and Group Movement. 255-262
Session 15: Physical Design Challenges for Automotive
- Chung-Wei Lin

:
Design Automation Challenges for Automotive Systems. 263 - Goeran Jerke

:
Physical Design Challenges for Automotive ASICs. 265 - Rob Knoth

:
Solving the Physical Challenges for the Next Generation of Safety Critical & High Reliability Systems. 267
Session 16: Contest Results and Closing Remarks
- Rongjian Liang

, Anthony Agnesina
, Wen-Hao Liu
, Haoxing Ren
:
GPU/ML-Enhanced Large Scale Global Routing Contest. 269-274

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