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ORCIDAndrew B. Kahng
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- affiliation: University of California, San Diego, USA
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2020 – today
- 2024
[j149]Andrew B. Kahng
, Arya Mazumdar, Jodi Reeves, Yusu Wang:
The TILOS AI Institute: Integrating optimization and AI for chip design, networks, and robotics. AI Mag. 45(1): 54-60 (2024)- [j148]Suhyeong Choi, Jinwook Jung, Andrew B. Kahng, Minsoo Kim, Chul-Hong Park, Bodhisatta Pramanik, Dooseok Yoon:
PROBE3.0: A Systematic Framework for Design-Technology Pathfinding With Improved Design Enablement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1218-1231 (2024) - [j147]Ismail Bustany, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang:
K-SpecPart: Supervised Embedding Algorithms and Cut Overlay for Improved Hypergraph Partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1232-1245 (2024) - [j146]Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-Scale Complex IP Blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1552-1565 (2024) - [j145]Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Sachin S. Sapatnekar:
A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route. ACM Trans. Design Autom. Electr. Syst. 29(1): 18:1-18:25 (2024) - [c345]Andrew B. Kahng, Robert R. Nerem, Yusu Wang, Chien-Yi Yang:
NN-Steiner: A Mixed Neural-Algorithmic Approach for the Rectilinear Steiner Minimum Tree Problem. AAAI 2024: 13022-13030 - [c344]Andrew B. Kahng, Seokhyeong Kang, Minhyuk Kweon:
Improvement of Mixed Track - Height Standard-Cell Placement. DATE 2024: 1-6 - [c343]Andrew B. Kahng, Sayak Kundu, Shreyas Thumathy:
Scalable Flip-Flop Clustering Using Divide and Conquer For Capacitated K-Means. ACM Great Lakes Symposium on VLSI 2024: 177-184 - [c342]Andrew B. Kahng, Bodhisatta Pramanik, Mingyu Woo:
A Hybrid ECO Detailed Placement Flow for Improved Reduction of Dynamic IR Drop. ACM Great Lakes Symposium on VLSI 2024: 390-396 - [c341]Andrew B. Kahng:
Panel Statement: EDA Needs at Advanced Technology Nodes. ISPD 2024: 63 - [c340]Andrew B. Kahng:
Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design. ISPD 2024: 117-124 - [c339]Joong-Won Jeon, Andrew B. Kahng, Jaehyun Kang, Jaehwan Kim, Mingyu Woo:
SLO-ECO: Single-Line-Open Aware ECO Detailed Placement and Detailed Routing Co-Optimization. ISQED 2024: 1-8 - [c338]Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu:
OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. VTS 2024: 1-4 - [i11]Andrew B. Kahng, Zhiang Wang:
DG-RePlAce: A Dataflow-Driven GPU-Accelerated Analytical Global Placement Framework for Machine Learning Accelerators. CoRR abs/2404.13049 (2024) - 2023
- [j144]Andrew B. Kahng:
Machine Learning for CAD/EDA: The Road Ahead. IEEE Des. Test 40(1): 8-16 (2023) - [j143]Chung-Kuan Cheng, Chester Holtz, Andrew B. Kahng, Bill Lin, Uday Mallappa:
DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs. ACM Trans. Design Autom. Electr. Syst. 28(4): 52:1-52:31 (2023) - [c337]Ismail Bustany, Grigor Gasparyan, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang:
An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design. ICCAD 2023: 1-9 - [c336]Jiang Hu, Andrew B. Kahng:
Invited Paper: The Inevitability of AI Infusion Into Design Closure and Signoff. ICCAD 2023: 1-7 - [c335]Jinwook Jung, Andrew B. Kahng, Sayak Kundu, Zhiang Wang, Dooseok Yoon:
Invited Paper: IEEE CEDA DATC Emerging Foundations in IC Physical Design and MLCAD Research. ICCAD 2023: 1-7 - [c334]Chung-Kuan Cheng, Andrew B. Kahng, Sayak Kundu, Yucheng Wang, Zhiang Wang:
Assessment of Reinforcement Learning for Macro Placement. ISPD 2023: 158-166 - [c333]Andrew B. Kahng, Shreyas Thumathy, Mingyu Woo:
An Effective Cost-Skew Tradeoff Heuristic for VLSI Global Routing. ISQED 2023: 1-8 - [c332]Ismail Bustany, Grigor Gasparyan, Amit Gupta, Andrew B. Kahng, Meghraj Kalase, Wuxi Li, Bodhisatta Pramanik:
The 2023 MLCAD FPGA Macro Placement Benchmark Design Suite and Contest Results. MLCAD 2023: 1-6 - [c331]Chung-Kuan Cheng, Andrew B. Kahng, Bill Lin, Yucheng Wang, Dooseok Yoon:
Gear-Ratio-Aware Standard Cell Layout Framework for DTCO Exploration. SLIP 2023: 2:1-2:10 - [i10]Chung-Kuan Cheng, Andrew B. Kahng, Sayak Kundu, Yucheng Wang, Zhiang Wang:
Assessment of Reinforcement Learning for Macro Placement. CoRR abs/2302.11014 (2023) - [i9]Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-scale Complex IP Blocks. CoRR abs/2304.11761 (2023) - [i8]Suhyeong Choi, Jinwook Jung, Andrew B. Kahng, Minsoo Kim, Chul-Hong Park, Bodhisatta Pramanik, Dooseok Yoon:
PROBE3.0: A Systematic Framework for Design-Technology Pathfinding with Improved Design Enablement. CoRR abs/2304.13215 (2023) - [i7]Ismail Bustany, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang:
K-SpecPart: A Supervised Spectral Framework for Multi-Way Hypergraph Partitioning Solution Improvement. CoRR abs/2305.06167 (2023) - [i6]Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Sachin S. Sapatnekar:
A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route. CoRR abs/2305.06917 (2023) - [i5]Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng, Sean Kinzer, Susmita Dey Manasi, Sachin S. Sapatnekar, Zhiang Wang:
Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations. CoRR abs/2306.16767 (2023) - [i4]Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Sayak Kundu, Rohan Mahapatra, Susmita Dey Manasi, Sachin S. Sapatnekar, Zhiang Wang, Ziqing Zeng:
An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators. CoRR abs/2308.12120 (2023) - [i3]Andrew B. Kahng, Robert R. Nerem, Yusu Wang, Chien-Yi Yang:
NN-Steiner: A Mixed Neural-algorithmic Approach for the Rectilinear Steiner Minimum Tree Problem. CoRR abs/2312.10589 (2023) - 2022
- [j142]Andrew B. Kahng, Minsoo Kim, Seungwon Kim, Mingyu Woo:
RosettaStone: Connecting the Past, Present, and Future of Physical Design Research. IEEE Des. Test 39(5): 70-78 (2022) - [j141]Andrew B. Kahng, Jian Kuang, Wen-Hao Liu, Bangqi Xu:
In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 784-788 (2022) - [j140]Andrew B. Kahng, Lutong Wang, Bangqi Xu:
TritonRoute-WXL: The Open-Source Router With Integrated DRC Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1076-1089 (2022) - [j139]Chung-Kuan Cheng, Andrew B. Kahng, Hayoung Kim, Minsoo Kim, Daeyeal Lee, Dongwon Park, Mingyu Woo:
PROBE2.0: A Systematic Framework for Routability Assessment From Technology to Design in Advanced Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1495-1508 (2022) - [c330]Andrew B. Kahng:
AI/ML, Optimization and EDA in the TILOS AI Research Institute. ACM Great Lakes Symposium on VLSI 2022: 1 - [c329]Ismail Bustany, Andrew B. Kahng, Ioannis Koutis, Bodhisatta Pramanik, Zhiang Wang:
SpecPart: A Supervised Spectral Framework for Hypergraph Partitioning Solution Improvement. ICCAD 2022: 13:1-13:9 - [c328]Andrew B. Kahng:
A Mixed Open-Source and Proprietary EDA Commons for Education and Prototyping. ICCAD 2022: 17:1-17:6 - [c327]Jinwook Jung, Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
IEEE CEDA DATC: Expanding Research Foundations for IC Physical Design and ML-Enabled EDA. ICCAD 2022: 96:1-96:8 - [c326]Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
RTL-MP: Toward Practical, Human-Quality Chip Planning and Macro Placement. ISPD 2022: 3-11 - [c325]Andrew B. Kahng:
Leveling Up: A Trajectory of OpenROAD, TILOS and Beyond. ISPD 2022: 73-79 - [c324]Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Sachin S. Sapatnekar:
From Global Route to Detailed Route: ML for Fast and Accurate Wire Parasitics and Timing Prediction. MLCAD 2022: 7-14 - [c323]Hadi Esmaeilzadeh, Soroush Ghodrati, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Sayak Kundu, Rohan Mahapatra, Susmita Dey Manasi, Sachin S. Sapatnekar, Zhiang Wang, Ziqing Zeng:
Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms. MLCAD 2022: 119-126 - 2021
- [j138]Andrew B. Kahng, Lutong Wang, Bangqi Xu:
TritonRoute: The Open-Source Detailed Router. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(3): 547-559 (2021) - [j137]Andrew B. Kahng, Seokhyeong Kang, Seungwon Kim, Bangqi Xu:
Enhanced Power Delivery Pathfinding for Emerging 3-D Integration Technology. IEEE Trans. Very Large Scale Integr. Syst. 29(4): 591-604 (2021) - [c322]Jianli Chen, Iris Hui-Ru Jiang, Jinwook Jung, Andrew B. Kahng, Seungwon Kim, Victor N. Kravets, Yih-Lang Li, Ravi Varadarajan, Mingyu Woo:
DATC RDF-2021: Design Flow and Beyond ICCAD Special Session Paper. ICCAD 2021: 1-6 - [c321]Hadi Esmaeilzadeh, Soroush Ghodrati, Jie Gu, Shiyu Guo, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Rohan Mahapatra, Susmita Dey Manasi, Edwin Mascarenhas, Sachin S. Sapatnekar, Ravi Varadarajan, Zhiang Wang, Hanyang Xu, Brahmendra Reddy Yatham, Ziqing Zeng:
VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis. ICCAD 2021: 1-7 - [c320]Jinwook Jung, Andrew B. Kahng, Seungwon Kim, Ravi Varadarajan:
METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD ICCAD Special Session Paper. ICCAD 2021: 1-9 - [c319]Chung-Kuan Cheng, Andrew B. Kahng, Ilgweon Kang, Minsoo Kim, Daeyeal Lee, Bill Lin, Dongwon Park, Mingyu Woo:
CoRe-ECO: Concurrent Refinement of Detailed Place-and-Route for an Efficient ECO Automation. ICCD 2021: 366-373 - [c318]Andrew B. Kahng:
Advancing Placement. ISPD 2021: 15-22 - 2020
- [j136]Mateus Fogaça, Andrew B. Kahng, Eder Monteiro, Ricardo Reis, Lutong Wang, Mingyu Woo:
On the superiority of modularity-based clustering for determining placement-relevant clusters. Integr. 74: 32-44 (2020) - [j135]Kwangsoo Han, Andrew B. Kahng, Jiajia Li:
Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 478-491 (2020) - [j134]Hamed Fatemi, Andrew B. Kahng, Hyein Lee, José Pineda de Gyvez:
Heuristic Methods for Fine-Grain Exploitation of FDSOI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2860-2871 (2020) - [j133]Ayse K. Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Aditya Narayan, Vaishnav Srinivas:
Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5183-5196 (2020) - [c317]Vidya A. Chhabria, Andrew B. Kahng, Minsoo Kim, Uday Mallappa, Sachin S. Sapatnekar, Bangqi Xu:
Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques. ASP-DAC 2020: 44-49 - [c316]Andrew B. Kahng, Lutong Wang, Bangqi Xu:
The Tao of PAO: Anatomy of a Pin Access Oracle for Detailed Routing. DAC 2020: 1-6 - [c315]Jianli Chen, Iris Hui-Ru Jiang, Jinwook Jung, Andrew B. Kahng, Victor N. Kravets, Yih-Lang Li, Shih-Ting Lin, Mingyu Woo:
DATC RDF-2020: Strengthening the Foundation for Academic Research in IC Physical Design. ICCAD 2020: 71:1-71:6 - [c314]Andrew B. Kahng:
MLCAD Today and Tomorrow: Learning, Optimization and Scaling. MLCAD 2020: 1 - [c313]Tuck-Boon Chan, Andrew B. Kahng, Mingyu Woo:
Revisiting inherent noise floors for interconnect prediction. SLIP 2020: 10 - [c312]Hamed Fatemi, Andrew B. Kahng, Minsoo Kim, José Pineda de Gyvez:
Optimal bounded-skew steiner trees to minimize maximum k-active dynamic power. SLIP 2020: 12 - [c311]Andrew B. Kahng:
Open-Source EDA: If We Build It, Who Will Come? VLSI-SOC 2020: 1-6 - [c310]Abdelrahman Hosny, Andrew B. Kahng:
Tutorial: Open-Source EDA and Machine Learning for IC Design: A Live Update. VLSID 2020: 1-14 - [e4]Andrew B. Kahng:
SLIP '20: System-Level Interconnect - Problems and Pathfinding Workshop, San Diego, California, November 5, 2020. ACM 2020, ISBN 978-1-4503-8106-2 [contents]
2010 – 2019
- 2019
- [j132]Hamed Fatemi, Andrew B. Kahng, Hyein Lee, Jiajia Li, José Pineda de Gyvez:
Enhancing sensitivity-based power reduction for an industry IC design context. Integr. 66: 96-111 (2019) - [j131]Changho Han, Andrew B. Kahng, Lutong Wang, Bangqi Xu:
Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10 nm VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1703-1716 (2019) - [j130]Chung-Kuan Cheng, Andrew B. Kahng, Ilgweon Kang, Lutong Wang:
RePlAce: Advancing Solution Quality and Routability Validation in Global Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1717-1730 (2019) - [c309]Yi Cao, Andrew B. Kahng, Joseph Li, Abinash Roy, Vaishnav Srinivas, Bangqi Xu:
Learning-based prediction of package power delivery network quality. ASP-DAC 2019: 160-166 - [c308]Sun ik Heo, Andrew B. Kahng, Minsoo Kim, Lutong Wang:
Diffusion break-aware leakage power optimization and detailed placement in sub-10nm VLSI. ASP-DAC 2019: 550-556 - [c307]Mateus Fogaça, Andrew B. Kahng, Ricardo Reis, Lutong Wang:
Finding placement-relevant clusters with fast modularity-based clustering. ASP-DAC 2019: 569-576 - [c306]Tutu Ajayi, Vidya A. Chhabria, Mateus Fogaça, Soheil Hashemi, Abdelrahman Hosny, Andrew B. Kahng, Minsoo Kim, Jeongsup Lee, Uday Mallappa, Marina Neseem, Geraldo Pradipta, Sherief Reda, Mehdi Saligane, Sachin S. Sapatnekar, Carl Sechen, Mohamed Shalan, William Swartz, Lutong Wang, Zhehong Wang, Mingyu Woo, Bangqi Xu:
Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project. DAC 2019: 76 - [c305]Andrew B. Kahng, Uday Mallappa, Lawrence K. Saul, Shangyuan Tong:
"Unobserved Corner" Prediction: Reducing Timing Analysis Effort for Faster Design Convergence in Advanced-Node Design. DATE 2019: 168-173 - [c304]Sun ik Heo, Andrew B. Kahng, Minsoo Kim, Lutong Wang, Chutong Yang:
Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI. DATE 2019: 830-835 - [c303]Andrew B. Kahng, Seokhyeong Kang, Seungwon Kim, Kambiz Samadi, Bangqi Xu:
Power Delivery Pathfinding for Emerging Die-to-Wafer Integration Technology. DATE 2019: 842-847 - [c302]Jianli Chen, Iris Hui-Ru Jiang, Jinwook Jung, Andrew B. Kahng, Victor N. Kravets, Yih-Lang Li, Shih-Ting Lin, Mingyu Woo:
DATC RDF-2019: Towards a Complete Academic Reference Design Flow. ICCAD 2019: 1-6 - [c301]Chia-Tung Ho, Andrew B. Kahng:
IncPIRD: Fast Learning-Based Prediction of Incremental IR Drop. ICCAD 2019: 1-8 - [c300]Andrew B. Kahng:
Looking Into the Mirror of Open Source: Invited Paper. ICCAD 2019: 1-8 - 2018
- [j129]Jiang Xu, Yuichi Nakamura, Andrew B. Kahng:
Silicon Photonics for Computing Systems. ACM J. Emerg. Technol. Comput. Syst. 14(2): 20 (2018) - [j128]Sorin Dobre, Andrew B. Kahng, Jiajia Li:
Design Implementation With Noninteger Multiple-Height Cells for Improved Design Quality in Advanced Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 855-868 (2018) - [j127]Alex Kahng, Andrew B. Kahng, Hyein Lee, Jiajia Li:
PROBE: A Placement, Routing, Back-End-of-Line Measurement Utility. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1459-1472 (2018) - [c299]Andrew B. Kahng:
New directions for learning-based IC design tools and methodologies. ASP-DAC 2018: 405-410 - [c298]Kwangsoo Han, Andrew B. Kahng, Christopher Moyes, Alex Zelikovsky:
A study of optimal cost-skew tradeoff and remaining suboptimality in interconnect tree constructions. SLIP@DAC 2018: 2:1-2:8 - [c297]Andrew B. Kahng:
Reducing time and effort in IC implementation: a roadmap of challenges and solutions. DAC 2018: 36:1-36:6 - [c296]Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Saiful A. Mojumder, Tiansheng Zhang:
Leveraging thermally-aware chiplet organization in 2.5D systems to reclaim dark silicon. DATE 2018: 1441-1446 - [c295]Andrew B. Kahng, Lutong Wang, Bangqi Xu:
TritonRoute: an initial detailed router for advanced VLSI technologies. ICCAD 2018: 81 - [c294]Ayse K. Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Vaishnav Srinivas:
A cross-layer methodology for design and optimization of networks in 2.5D systems. ICCAD 2018: 101 - [c293]Andrew B. Kahng, Uday Mallappa, Lawrence K. Saul:
Using Machine Learning to Predict Path-Based Slack from Graph-Based Timing Analysis. ICCD 2018: 603-612 - [c292]Andrew B. Kahng, Christopher Moyes, Sriram Venkatesh, Lutong Wang:
Wot the L: Analysis of Real versus Random Placed Nets, and Implications for Steiner Tree Heuristics. ISPD 2018: 2-9 - [c291]Charles J. Alpert, Wing-Kai Chow, Kwangsoo Han, Andrew B. Kahng, Zhuo Li, Derong Liu, Sriram Venkatesh:
Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees. ISPD 2018: 10-17 - [c290]Andrew B. Kahng:
Machine Learning Applications in Physical Design: Recent Results and Directions. ISPD 2018: 68-73 - [c289]Andrew B. Kahng:
Influence of Professor T. C. Hu's Works on Fundamental Approaches in Layout. ISPD 2018: 114-119 - [c288]Chung-Kuan Cheng, T. C. Hu, Andrew B. Kahng:
Theory and Algorithms of Physical Design. ISPD 2018: 130-131 - [p2]Andrew B. Kahng, Ion I. Mandoiu, Alexander Zelikovsky:
Practical Approximations of Steiner Trees in Uniform Orientation Metrics. Handbook of Approximation Algorithms and Metaheuristics (1) 2018: 657-669 - 2017
- [j126]Wei-Ting Jonas Chan, Andrew B. Kahng, Jiajia Li:
Revisiting 3DIC benefit with multiple tiers. Integr. 58: 226-235 (2017) - [j125]Armin Alaghi, Wei-Ting Jonas Chan, John P. Hayes, Andrew B. Kahng, Jiajia Li:
Trading Accuracy for Energy in Stochastic Circuit Design. ACM J. Emerg. Technol. Comput. Syst. 13(3): 47:1-47:30 (2017) - [j124]Rajeev Balasubramonian, Andrew B. Kahng, Naveen Muralimanohar, Ali Shafiee, Vaishnav Srinivas:
CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories. ACM Trans. Archit. Code Optim. 14(2): 14:1-14:25 (2017) - [j123]Tuck-Boon Chan, Puneet Gupta, Kwangsoo Han, Abde Ali Kagalwalla, Andrew B. Kahng:
Benchmarking of Mask Fracturing Heuristics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 170-183 (2017) - [j122]José L. Abellán, Ayse K. Coskun, Anjun Gu, Warren Jin, Ajay Joshi, Andrew B. Kahng, Jonathan Klamkin, Cristian Morales, John Recchio, Vaishnav Srinivas, Tiansheng Zhang:
Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 801-814 (2017) - [j121]Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang:
MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(7): 1075-1088 (2017) - [j120]Prabhav Agrawal, Mike Broxterman, Biswadeep Chatterjee, Patrick Cuevas, Kathy H. Hayashi, Andrew B. Kahng, Pranay K. Myana, Siddhartha Nath:
Optimal Scheduling and Allocation for IC Design Management and Cost Reduction. ACM Trans. Design Autom. Electr. Syst. 22(4): 60:1-60:30 (2017) - [j119]Farshad Firouzi, Bahar J. Farahani, Andrew B. Kahng, Jan M. Rabaey, Natasha Balac:
Guest Editorial: Alternative Computing and Machine Learning for Internet of Things. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2685-2687 (2017) - [j118]Kristof Blutman, Hamed Fatemi, Ajay Kapoor, Andrew B. Kahng, Jiajia Li, José Pineda de Gyvez:
Logic Design Partitioning for Stacked Power Domains. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3045-3056 (2017) - [c287]Kristof Blutman, Hamed Fatemi, Andrew B. Kahng, Ajay Kapoor, Jiajia Li, José Pineda de Gyvez:
Floorplan and placement methodology for improved energy reduction in stacked power-domain design. ASP-DAC 2017: 444-449 - [c286]Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang:
Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes. DAC 2017: 51:1-51:6 - [c285]Changho Han, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Lutong Wang, Bangqi Xu:
Optimal multi-row detailed placement for yield and model-hardware correlation improvements in sub-10nm VLSI. ICCAD 2017: 667-674 - [c284]Tuck-Boon Chan, Wei-Ting Jonas Chan, Andrew B. Kahng:
ILP-Based Identification of Redundant Logic Insertions for Opportunistic Yield Improvement during Early Process Learning. ICCD 2017: 269-272 - [c283]Wei-Ting Jonas Chan, Pei-Hsin Ho, Andrew B. Kahng, Prashant Saxena:
Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning. ISPD 2017: 15-21 - [c282]Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Lutong Wang:
Performance- and energy-aware optimization of BEOL interconnect stack geometry in advanced technology nodes. ISQED 2017: 104-110 - 2016
- [c281]Wei-Ting Jonas Chan, Kun Young Chung, Andrew B. Kahng, Nancy D. MacDonald, Siddhartha Nath:
Learning-based prediction of embedded memory timing failures during initial floorplan design. ASP-DAC 2016: 178-185 - [c280]Samyoung Bang, Kwangsoo Han, Andrew B. Kahng, Mulong Luo:
Delay uncertainty and signal criticality driven routing channel optimization for advanced DRAM products. ASP-DAC 2016: 697-704 - [c279]Kun Young Chung, Andrew B. Kahng, Jiajia Li:
Comprehensive optimization of scan chain timing during late-stage IC implementation. DAC 2016: 61:1-61:6 - [c278]