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ITC-Asia 2021: Shanghai, China
- IEEE International Test Conference in Asia, ITC-Asia 2021, Shanghai, China, August 18-20, 2021. IEEE 2021, ISBN 978-1-6654-1334-3

- Xiaole Cui, Yongliang Chen, Wenqiang Ye, Xiaoxin Cui:

The ANN Based Modeling Attack and Security Enhancement of the Double-layer PUF. 1-6 - Yi-Zhan Hsieh, Hsiao-Yin Tseng, I-Wei Chiu

, James Chien-Mo Li:
Fault Modeling and Testing of Spiking Neural Network Chips. 1-6 - Chang Hao, Zhengfeng Huang, Tianming Ni:

Kelvin Bridge Structure Based TSV Test for Weak Faults. 1-6 - Mitsuo Matsumoto, Masayuki Kawabata, Yukio Kawanabe:

High-speed measurement of Piezoelectric MEMS equivalent circuit parameters by Swept-sine and PRBS signals. 1-6 - Tuanhui Xu, Junlin Huang, Mingen Bu, Zhe Jiang:

An SRAM Test Quality Improvement Method For Automotive chips. 1-4 - Xiaoze Lin

, Liyang Lai, Huawei Li
:
Scalable Parallel Static Learning. 1-6 - Yi-Hsuan Lee, Shi-Yu Huang:

Rigorous Test Flow for PLL to Identify Weak Devices. 1-6 - Yu Huang, Wu-Tung Cheng, Ruifeng Guo

, Sameer Chillarige:
Diagnosis and Yield Learning. 1 - Aibin Yan, Zijie Zhai, Lele Wang, Jixiang Zhang, Ningning Cui, Tianming Ni, Xiaoqing Wen:

Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing. 1-5 - Han Yang, Zeyu Zhao, Zhikuang Cai:

An optimized DFT technology based on machine learning. 1-4 - Qidong Wang, Aijiao Cui, Gang Qu:

Identification of Counter Registers through Full Scan Chain. 1-5 - Cheng-Di Tsai, Hsiao-Wen Fu, Ting-Yu Chen, Tsung-Chu Huang:

TAIWAN Online: Test AI with AN Codes Online for Automotive Chips. 1-6 - Huaguo Liang, Danqing Li, Zhao Yang, Tianming Ni, Zhengfeng Huang, Cuiyun Jiang:

A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs. 1-5 - John Z.-L. Tang, Dave Y.-W. Lin, Ralf E.-H. Yee, Charles H.-P. Wen

:
AMSER-FF: Area-Minimized Soft-Error-Recoverable Flip-Flop for Radiation Hardening. 1-6 - Chen-Lin Tsai, Wei-Hao Chen, Shi-Yu Huang:

A Duty-Cycle Monitor Supporting A Wide Frequency Range of Clock Signal. 1-6 - Zhen Wang, Guofa Zhang, Jing Ye, Jianhui Jiang:

Reliability Evaluation of Approximate Arithmetic Circuits Based on Signal Probability. 1-6 - Chenwei Liu, Jie Ou:

Use Machine Learning Based Smart Sampling to Improve System Level Testing Efficiency. 1-6 - Yu Huang, Haitao Fu, Bin Deng, Edward Seng, Marc Hutner, Jean-Francois Cote, Geir Eide:

The Advancement of 1149.10. 1 - Katherine Shu-Min Li, Leon Li-Yang Chen, Peter Yi-Yu Liao, Sying-Jyan Wang

, Andrew Yi-Ann Huang, Ken Chau-Cheung Cheng:
Integrated Scratch Marker for Wafer Defect Diagnosis. 1-4 - Wei Hu, Jing Tan, Lingjuan Wu, Yu Tai, Liang Hong:

Developing Formal Models for Measuring Fault Effects Using Functional EDA Tools. 1-6 - Shuo Cai, Caicai Xie, Yan Wen, Weizheng Wang:

A Low-Cost Quadruple-Node-Upset Self-Recoverable Latch Design. 1-5 - Yu Huang, David Francis, Yervant Zorian, Nilanjan Mukherjee:

Automotive Test and Reliability. 1 - Kai-Hsun Chen, Bo-Yi Yang, Jia-Ruei Liang, Hung-Lin Chen, Jiun-Lang Huang:

Automatic Test Program Generation for Transition Delay Faults in Pipelined Processors. 1-6 - Arjun Chaudhuri, Krishnendu Chakrabarty:

Testing and Fault-Localization Solutions for Monolithic 3D ICs*. 1-6

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