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ORCID8th LASCAS 2017: Bariloche, Argentina
- 8th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2017, Bariloche, Argentina, February 20-23, 2017. IEEE 2017, ISBN 978-1-5090-5859-4
- Albert Z. Wang, Fei Lu, Qi Chen, Chenkun Wang, Cheng Li, Feilong Zhang:
Key note: Integrated design-for-reliability for ICs. 1-4 - M. T. Kousoulis, Constantine A. Coutras, G. E. Antoniou:
4D reverberator-based digital filters. 1-4 - Rodrigo A. S. Braga
, Luis Henrique de Carvalho Ferreira, Gustavo Della Colletta, Odilon O. Dutra:
Calibration-less Nauta OTA operating at 0.25-V power supply in a 130-nm digital CMOS process. 1-4 - Esteban O. Lindstrom, Luciano Andres Garcia-Rodriguez, Alejandro R. Oliva, Juan Carlos Balda:
Designing an optimum non-dissipative LC snubber for step-up flyback converters in DCM. 1-4 - Satomi Ogawa:
A low-power, high-accuracy capacitance-to-time converter for differential capacitive sensors. 1-4 - Pablo A. Petrashin, Luis E. Toledo, Walter J. Lancioni, Piotr J. Osuch, Tinus Stander:
Oscillation-based test in a CCII-based bandpass filter. 1-4 - Ioannis Vourkas, Jorge Gomez, Angel Abusleme, Nikolaos Vasileiadis, Georgios Ch. Sirakoulis, Antonio Rubio:
Exploring the voltage divider approach for accurate memristor state tuning. 1-4 - Mauricio Martins Donatti, Leandro Tiago Manera:
Object identification using VSWR évaluation based on a narrowband microstrip antenna and a tuned amplifier. 1-4 - Antônio Carlos M. de Queiroz:
Biased capacitive divider electrostatic generators for energy harvesting. 1-4 - Hiroo Wakaumi:
A switched-capacitor filter with dynamic switching bias OP amplifiers. 1-4 - Roberto S. Murphy, Luz Karine Sandoval Granados:
A versatile, CMOS compatible, integrated antenna for millimeter-wave applications. 1-4 - M. Prieto, L. Sugezky, N. Gonzalez, M. Giura, Yao-Ming Kuo, M. Trujillo, J. M. Cruz:
Evaluation of the uModel factory software used for the modeling of embedded systems with concurrent states. 1-4 - Vicente Carvalho, Fernanda Lima Kastensmidt:
Enhancing I2C robustness to soft errors. 1-4 - Sara S. Ghoreishizadeh, Dorian Haci, Yan Liu, Timothy G. Constandinou:
A 4-wire interface SoC for shared multi-implant power transfer and full-duplex communication. 1-4 - Arthur Campos de Oliveira, David Cordova, Hamilton Duarte Klimach, Sergio Bampi:
A 0.45 V, 93 pW temperature-compensated CMOS voltage reference. 1-4 - Daniel Calderón-Preciado, Federico Sandoval-Ibarra, Fernando Silveira:
Settling time-based design of a fully differential OTA for a SC integrator. 1-4 - Yuri Marchetti Tavares, Nadia Nedjah, Luiza de Macedo Mourelle:
Co-design system for template matching using dedicated co-processor and particle swarm optimization. 1-4 - Jonatas F. Rossetti, Wilson Vicente Ruggiero:
Hardware implementation for permutation function of multiplication-hardened sponge BlaMka. 1-4 - Kang Wei, Dongsheng Brian Ma:
Comparative topology and power loss study for high power density and high conversion ratio integrated switching power converters. 1-4 - Piotr Patronik, Stanislaw J. Piestrak:
Design of residue generators with CLA/compressor trees and multi-bit EAC. 1-4 - Boris Moret, Vincent Knopik, Eric Kerherve:
A 28GHz self-contained power amplifier for 5G applications in 28nm FD-SOI CMOS. 1-4 - Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner:
Asymmetrical length biasing for energy efficient digital circuits. 1-4 - Laura D. Yelios, Federico Suarez, Matias Bignert, Jose L. Correa Lust, Alejandro Almela, Angel Cancio, Mariela Josebachuili, Agustin Lucero, Alexis Mancilla, Javier Maya, Beatriz García:
Silicon photo-multipliers characterization system. 1-4 - Walter E. Calienes Bartra, Andrei Vladimirescu, Ricardo Reis:
Process and temperature impact on single-event transients in 28nm FDSOI CMOS. 1-4 - Ádria Barros de Oliveira, Lucas Antunes Tambara, Fernanda Lima Kastensmidt:
Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors. 1-4 - André Flores dos Santos, Lucas Antunes Tambara, Fernanda Lima Kastensmidt:
Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA. 1-4 - Lei Zhang:
Fixed-point FPGA model-based design and optimization for Henon map chaotic generator. 1-4 - Luciana de Micco, Maximiliano Antonelli, Maria Liz Crespo, Andres Cicuttin:
HW/SW codesign of maximum Lyapunov exponent estimator. 1-4 - Fabian E. Giana, Fabián José Bonetto, Mariela I. Bellotti:
Gold-copper-based biosensor for impedance analysis of mammalian adherent cells. 1-4 - Pablo Gardella, Villa Fernandez Emanuel, Baez Eduardo, M. Cesaretti Juan:
A chopped front-end system with common-mode feedback for real time ECG applications. 1-4 - Gordana Jovanovic-Dolecek, Ricardo Garcia Baez:
Nonrecursive comb-based structure for power of three decimation factors: Design and FPGA implementation. 1-4 - Carlos Salazar-Garcia, Reinaldo Castro-Gonzalez, Alfonso Chacon-Rodriguez:
RISC-V based sound classifier intended for acoustic surveillance in protected natural environments. 1-4 - Felipe G. A. e Silva, Walter Magalhaes, Jarbas Silveira, Joao Marcelo Ferreira, Philippe de S. Magalhães, Otávio A. de Lima, César A. M. Marcon:
Evaluation of multiple bit upset tolerant codes for NoCs buffering. 1-4 - Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. 1-4 - S. Alejandro Rodriguez, O. Juan G. Avalos, G. Juan C. Sanchez:
Filtered-x Error Coded Affine Projection algorithm with Evolving order for active noise control. 1-4 - Shadi M. Harb, William R. Eisenstadt:
A study of characterizing crosstalk effects in 3-D vias. 1-4 - Ygor Q. de Aguiar, Cristina Meinhardt, Ricardo A. L. Reis:
Radiation sensitivity of XOR topologies in multigate technologies under voltage variability. 1-4 - Lázaro Bustio-Martínez, René Cumplido, Mauro Martín Letras Luna, Claudia Feregrino Uribe, Raudel Hernández-León, José Manuel Bande Serrano:
Approximate frequent itemsets mining on data streams using hashing and lexicographie order in hardware. 1-4 - Illiani Carro-Pérez, Hugo G. González-Hernández, Carlos Sánchez-López:
High-frequency memristive synapses. 1-4 - Mehmet Ince, Sule Ozev, Sarma B. K. Vrudhula:
Statistical library characterization using arbitrary polynomial chaos. 1-4 - Ademir de Jesus Costa, Bruno Jambeiro Alves, Shirlene de Santana Soares, Edson Pinto Santana, Ana Isabela Araújo Cunha:
Improving a MOSFET model for design by hand. 1-4 - Pablo Perez-Nicoli, Fernando Silveira:
Reconfigurable multiple-gain active-rectifier for maximum efficiency point tracking in WPT. 1-4 - Rigel Procópio Fernandes, José Antonio Apolinário, Antonio L. L. Ramos:
Bearings-only aerial shooter localization using a microphone array mounted on a drone. 1-4 - Emerson Lopes Machado, Thiago Marques, Carlos H. Llanos, Renato Coral Sampaio, Ricardo Pezzuol Jacobi:
FPGA implementation of a feedforward neural network-based classifier using the xQuant technique. 1-4 - Joel Gak, Matías R. Miguez, Alfredo Arnaud, Pablo Sergio Mandolesi:
Blind range level shifters from 0 to 18 V. 1-4 - Salim Lahmiri, Mounir Boukadoum:
A comparison of four PDE-spatial denoising systems for molecular images. 1-4 - José Luis Valtierra, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez:
A 2.2 μW analog front-end for multichannel neural recording. 1-4 - Arthur Liraneto Torres Costa, Hamilton Klimach, Sergio Bampi:
A high IIP3 6.5 mW self-biased 0.3-3 GHz small area LNA. 1-4 - G. Sionek, L. H. A. Lolis, J. P. C. Cunha, M. L. Matias, André Augusto Mariano, Bernardo Leite:
Double quadrature bandpass sampling for a PLL and mixer-less low-IF multistandard receiver. 1-4 - Douglas Corrêa, Daniel Palomino, Luciano Volcan Agostini, Bruno Zatt:
Energy evaluation of the HEVC decoding for different encoding configurations. 1-4 - Bruno Bellini, Alfredo Amaud:
A 5μΑ wireless platform for cattle heat detection. 1-4 - María Belén D'Amico, Sergio A. Gonzalez:
A small-signal averaged model of a coupled-inductor boost converter. 1-4 - S. A. Gonzalez, Enrique Mario Spinelli, Alejandro L. Veiga, D. F. Coral, M. B. Fernandez van Raap, P. Mendoza Zelis, G. A. Pasquevich, F. H. Sanchez:
Portable electromagnetic field applicator for magnetic hyperthermia experiments. 1-4 - Rafael Ferreira, Bianca Silveira, Mateus Beck Fonseca, Cláudio Machado Diniz, Eduardo A. C. da Costa:
Low power sum of absolute differences architecture using novel hybrid adder. 1-4 - Thierry Bonnoit, Nacer-Eddine Zergainoh, Michael Nicolaidis, Raoul Velazco:
Low cost rollback to improve fault-tolerance in VLSI circuits. 1-4 - Juan-Guillermo Munoz, Guillermo Gallo, Fabiola Angulo, Gustavo Osorio:
Coexistence of solutions in a boost-flyback converter with current mode control. 1-4 - Luis Armando Rodriguez Flores, Miguel Morales-Sandoval, René Cumplido, Claudia Feregrino Uribe, Ignacio Algredo-Badillo:
A compact FPGA-based microcoded coprocessor for exponentiation in asymmetric encryption. 1-4 - Luiz Carlos Moreira, Jose Fontebasso Neto, Thiago Ferauche, Guilherme Apolinario Silva Novaes, Emmanuel Torres-Rios:
All-digital reconfigurable IR-UWB pulse generator using BPSK modulation in 130nm RF-CMOS process. 1-4 - Italo Machado, Wagner Penny, Marcelo Schiavon Porto, Luciano Volcan Agostini, Bruno Zatt:
Characterizing energy consumption in software HEVC encoders: HM vs x265. 1-4 - Guillermo Fernandez Moroni, Miguel Sofo Haro, Javier Tiffenberg, Eduardo E. Paolini, Juan Estrada, Xavier Bertou, Gustavo Cancelo:
Aspects on the shape dependence with energy of point-like events in high resistivity CCDs. 1-4 - Roger Luis Brito Zamparette, Hamilton Duarte Klimach, Sergio Bampi:
A 90% efficiency 60 mW MPPT switched capacitor DC - DC converter for photovoltaic energy harvesting aiming for IoT applications. 1-4 - Carlos Bernal, Manuel Jiménez:
Adherence of a high-speed RRP LDMOS characterization setup to JESD 24-10 standard. 1-4 - Renato H. Neuenfeld, Mateus Beck Fonseca, Eduardo A. C. da Costa, Jean P. Oses:
Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies. 1-4 - Felipe de Jesus Leal-Romo, José Ernesto Rayas-Sánchez, Jiangqi He:
Design of experiments implementation towards optimization of power distribution networks. 1-4 - Ricardo A. Guazzelli, Matheus T. Moreira, Ney Laert Vilar Calazans:
A comparison of asynchronous QDI templates using static logic. 1-4 - Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal:
High density emerging resistive memories: What are the limits? 1-4 - Bartlomiej Garda, Maciej Ogorzalek, Krzysztof Kasinski, Zbigniew Galias:
Studies of dynamics of memristor-basec memory cells. 1-4 - Stefan Slesazeck, H. Wylezich, Thomas Mikolajick:
Analog memristive and memcapacitive properties of Ti / AI2O3 / Nb2O5 / Ti resistive switches. 1-4 - Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Optimization opportunities in RRAM-based FPGA architectures. 1-4
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