


default search action
Yasuhiko Hagihara
Person information
Refine list

refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2019
- [j9]Takahiro Nakamura, Kenichiro Yashiki, Kenji Mizutani, Takaaki Nedachi, Junichi Fujikata, Masatoshi Tokushima, Jun Ushida, Masataka Noguchi, Daisuke Okamoto, Yasuyuki Suzuki, Takanori Shimizu, Koichi Takemura, Akio Ukita, Yasuhiro Ibusuki, Mitsuru Kurihara, Keizo Kinoshita, Tsuyoshi Horikawa, Hiroshi Yamaguchi, Junichi Tsuchida, Yasuhiko Hagihara, Kazuhiko Kurata:
Fingertip-Size Optical Module, "Optical I/O Core", and Its Application in FPGA. IEICE Trans. Electron. 102-C(4): 333-339 (2019) - 2016
- [j8]Kenichiro Yashiki, Toshinori Uemura, Mitsuru Kurihara, Yasuyuki Suzuki, Masatoshi Tokushima
, Yasuhiko Hagihara, Kazuhiko Kurata:
25-Gbps/ch Error-Free Operation over 300-m MMF of Low-Power-Consumption Silicon-Photonics-Based Chip-Scale Optical I/O Cores. IEICE Trans. Electron. 99-C(2): 148-156 (2016) - [c5]Kenichiro Yashiki, Kenji Mizutani, Jun Ushida, Yasuyuki Suzuki, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Yasuhiko Hagihara, Kazuhiko Kurata:
25-Gbps error-free operation of chip-scale Si-photonics optical transmitter over 70°C with integrated quantum dot laser. OFC 2016: 1-3 - 2015
- [c4]Kenji Mizutani
, Kenichiro Yashiki, Mitsuru Kurihara, Yasuyuki Suzuki, Yasuhiko Hagihara, Nobuaki Hatori, Takanori Shimizu, Yutaka Urino, Takahiro Nakamura, Kazuhiko Kurata, Yasuhiko Arakawa:
Optical I/O core transmitter with high tolerance to optical feedback using quantum dot laser. ECOC 2015: 1-3 - [c3]Kenichiro Yashiki, Yasuyuki Suzuki, Yasuhiko Hagihara, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata
, Akio Ukita, Koichi Takemura, Takanori Shimizu, Daisuke Okamoto, Jun Ushida
, Shigeki Takahashi, Toshinori Uemura, Makoto Okano, Junichi Tsuchida, Takaaki Nedachi, Makoto Fushimi, Ichiro Ogura, Jun Inasaka, Kazuhiko Kurata:
5 mW/Gbps hybrid-integrated Si-photonics-based optical I/O cores and their 25-Gbps/ch error-free operation with over 300-m MMF. OFC 2015: 1-3
2000 – 2009
- 2008
- [j7]Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara:
A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations. IEEE J. Solid State Circuits 43(4): 911-918 (2008) - 2006
- [j6]Masahiro Nomura, Taku Ohsawa, Koichi Takeda, Yoetsu Nakazawa, Yoshinori Hirota, Yasuhiko Hagihara, Naoki Nishi:
An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques. IEICE Trans. Electron. 89-C(3): 334-341 (2006) - [j5]Ko Yoshikawa
, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura:
Domino Logic Synthesis System and its Applications. J. Circuits Syst. Comput. 15(2): 277-287 (2006) - [j4]Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake:
A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications. IEEE J. Solid State Circuits 41(1): 113-121 (2006) - [j3]Masahiro Nomura, Yoshifumi Ikenaga, Koichi Takeda, Yoetsu Nakazawa, Yoshiharu Aimoto, Yasuhiko Hagihara:
Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes. IEEE J. Solid State Circuits 41(4): 805-814 (2006) - [c2]Koichi Takeda, Hidetoshi Ikeda, Yasuhiko Hagihara, Masahiro Nomura, Hiroyuki Kobatake:
Redefinition of Write Margin for Next-Generation SRAM and Write-Margin Monitoring Circuit. ISSCC 2006: 2602-2611 - 2004
- [c1]Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura:
Timing optimization by replacing flip-flops to latches. ASP-DAC 2004: 186-191
1990 – 1999
- 1997
- [j2]Yasuhiko Hagihara, Shigeto Inui, Fuyuki Okamoto, Masato Nishida, Toshihiko Nakamura, Hachiro Yamada:
Floating-point datapaths with online built-in self speed test. IEEE J. Solid State Circuits 32(3): 444-449 (1997) - 1991
- [j1]Fuyuki Okamoto, Yasuhiko Hagihara, Chie Ohkubo, Naoki Nishi, Hachiro Yamada, Tadayoshi Enomoto:
A 200-MFLOPS 100-MHz 64-b BiCMOS vector-pipelined processor (VPP) ULSI. IEEE J. Solid State Circuits 26(12): 1885-1893 (1991)
Coauthor Index

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-02-27 22:46 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint