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2010 – 2019
- 2019
[j2]Umanath Kamath
, Edward Cullen, Tao Yu, John Jennings, Susan Wu, Peng Lim, Brendan Farley, Robert Bogdan Staszewski:
A 1-V Bandgap Reference in 7-nm FinFET With a Programmable Temperature Coefficient and Inaccuracy of ±0.2% From -45°C to 125°C. IEEE J. Solid State Circuits 54(7): 1830-1840 (2019)- 2018
- [c6]Umanath Kamath, Edward Cullen, John Jennings, Ionut Cical, Darragh Walsh, Peng Lim, Brendan Farley, Robert Bogdan Staszewski:
A 1 V Bandgap Reference in 7-nm FinFET with a Programmable Temperature Coefficient and an Inaccuracy of ±0.2% from -45°C to 125°C. ESSCIRC 2018: 78-81 - [c5]Umanath Kamath, Tao Yu, Wei Yao, Edward Cullen, John Jennings, Susan Wu, Peng Lim, Brendan Farley, Robert Bogdan Staszewski:
BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and Temperature Sensing in 7-nm FinFET. ESSDERC 2018: 86-89 - [c4]Bruno Vaz, Bob Verbruggen, Christophe Erdmann, Diarmuid Collins, John McGrath, Ali Boumaalif, Edward Cullen, Darragh Walsh, Alonso Morgado, Conrado Mesadri, Brian Long, Rajitha Pathepuram, Ronnie De La Torre, Alvin Manlapat, Georgios Karyotis, Dimitris Tsaliagos, Patrick Lynch, Peng Lim, Daire Breathnach, Brendan Farley:
A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET. VLSI Circuits 2018: 99-100 - 2017
- [c3]Brendan Farley, Christophe Erdmann, Bruno Vaz, John McGrath, Edward Cullen, Bob Verbruggen, Roberto Pelliconi, Daire Breathnach, Peng Lim, Ali Boumaalif, Patrick Lynch, Conrado Mesadri, David Melinn, Kwee Peng Yap, Liam Madden:
A programmable RFSoC in 16nm FinFET technology for wideband communications. A-SSCC 2017: 1-4 - [c2]Christophe Erdmann, Edward Cullen, Damien Brouard, Roberto Pelliconi, Bob Verbruggen, John McGrath, Diarmuid Collins, Marites De La Torre, Pierrick Gay, Patrick Lynch, Peng Lim, Anthony Collins, Brendan Farley:
16.3 A 330mW 14b 6.8GS/s dual-mode RF DAC in 16nm FinFET achieving -70.8dBc ACPR in a 20MHz channel at 5.2GHz. ISSCC 2017: 280-281 - 2015
- [j1]Christophe Erdmann, Donnacha Lowney, Adrian Lynam, Aidan Keady, John McGrath, Edward Cullen, Daire Breathnach, Denis Keane, Patrick Lynch, Marites De La Torre, Ronnie De La Torre, Peng Lim, Anthony Collins, Brendan Farley, Liam Madden:
A Heterogeneous 3D-IC Consisting of Two 28 nm FPGA Die and 32 Reconfigurable High-Performance Data Converters. IEEE J. Solid State Circuits 50(1): 258-269 (2015) - 2014
- [c1]Christophe Erdmann, Donnacha Lowney, Adrian Lynam, Aidan Keady, John McGrath, Edward Cullen, Daire Breathnach, Denis Keane, Patrick Lynch, Marites De La Torre, Ronnie De La Torre, Peng Lim, Anthony Collins, Brendan Farley, Liam Madden:
6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters. ISSCC 2014: 120-121
Coauthor Index
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