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ORCIDHaoran Li 0002
Person information
- affiliation: Alibaba DAMO Academy Computing Technology Laboratory, Hangzhou, China
- affiliation (PhD 2019): Hong Kong University of Science and Technology, Department of Electronic and Computer Engineering, Hong Kong
Other persons with the same name
- Haoran Li — disambiguation page
- Haoran Li 0001
![[0000-0002-2368-7541]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-2368-7541")
— JD AI Research (and 2 more) - Haoran Li 0003 — Peking University, School of EECS, Beijing, China
- Haoran Li 0004 — Nanjing University of Aeronautics and Astronautics, Aero-Power Sci-Tech Center, China
- Haoran Li 0005 — Arizona State University, Tempe, AZ, USA
- Haoran Li 0006 — Rice University, Houston, TX, USA
- Haoran Li 0007 — Meta AI (and 1 more)
- Haoran Li 0008 — Wuhan University, Wuhan, Hubei, China
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2020 – today
- 2020
[j10]Zhongyuan Tian, Jiang Xu, Haoran Li, Rafael Kioji Vivas Maeda:
Multidevice Collaborative Power Management Through Decentralized Knowledge Sharing. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1128-1140 (2020)- [j9]Haoran Li, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Zhehui Wang, Zhifei Wang:
Chip-Specific Power Delivery and Consumption Co-Management for Process-Variation-Aware Manycore Systems Using Reinforcement Learning. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1150-1163 (2020)
2010 – 2019
- 2019
- [j8]Zhongyuan Tian, Zhe Wang, Jiang Xu, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda:
Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1203-1215 (2019) - 2018
- [j7]Haoran Li, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Peng Yang, Zhongyuan Tian:
Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2076-2086 (2018) - [c10]Zhongyuan Tian, Zhe Wang, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda, Jiang Xu:
Multi-device collaborative management through knowledge sharing. ASP-DAC 2018: 22-27 - [c9]Haoran Li, Harumichi Yokoyama, Takuya Araki:
Merge-Based Parallel Sparse Matrix-Sparse Vector Multiplication with a Vector Architecture. HPCC/SmartCity/DSS 2018: 43-50 - [c8]Haoran Li, Zhongyuan Tian, Rafael K. V. Maeda, Xuanqi Chen, Jun Feng, Jiang Xu:
Co-manage power delivery and consumption for manycore systems using reinforcement learning. ICCAD 2018: 34 - [c7]Zhongyuan Tian, Haoran Li, Rafael Kioji Vivas Maeda, Jun Feng, Jiang Xu:
Decentralized Collaborative Power Management through Multi-Device Knowledge Sharing. ICCD 2018: 409-412 - 2017
- [j6]Haoran Li, Xuan Wang, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang:
Energy-Efficient Power Delivery System Paradigms for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(3): 449-462 (2017) - [c6]Zhe Wang, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Haoran Li, Peng Yang, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen:
Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system. ASP-DAC 2017: 684-689 - [c5]Zhehui Wang, Zhengbin Pang, Peng Yang, Jiang Xu, Xuanqi Chen, Rafael K. V. Maeda, Zhifei Wang, Luan H. K. Duong, Haoran Li, Zhe Wang:
MOCA: an Inter/Intra-Chip Optical Network for Memory. DAC 2017: 86:1-86:6 - [c4]Haoran Li, Jiang Xu, Zhe Wang, Peng Yang, Rafael K. V. Maeda, Zhongyuan Tian:
Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators. DATE 2017: 1265-1268 - 2016
- [j5]Xuan Wang, Jiang Xu, Zhe Wang, Haoran Li, Peng Yang, Luan H. K. Duong, Rafael K. V. Maeda, Zhifei Wang:
Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign. ACM J. Emerg. Technol. Comput. Syst. 13(2): 19:1-19:24 (2016) - [j4]Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan Huu Kinh Duong, Zhifei Wang, Rafael Kioji Vivas Maeda, Haoran Li:
Improve Chip Pin Performance Using Optical Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1574-1587 (2016) - [j3]Zhehui Wang, Jiang Xu, Peng Yang, Luan Huu Kinh Duong, Zhifei Wang, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda:
A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2462-2474 (2016) - [j2]Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael K. V. Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart:
Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2475-2487 (2016) - [j1]Zhe Wang, Xuan Wang, Jiang Xu, Haoran Li, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang:
An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3373-3386 (2016) - [c3]Rafael K. V. Maeda, Peng Yang, Xiaowen Wu, Zhe Wang, Jiang Xu, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang:
JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. AISTECS@HiPEAC 2016: 8:1-8:6 - 2015
- [c2]Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H. K. Duong, Zhifei Wang, Haoran Li, Rafael Kioji Vivas Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao:
Alleviate chip I/O pin constraints for multicore processors through optical interconnects. ASP-DAC 2015: 791-796 - [c1]Zhe Wang, Xuan Wang, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong, Haoran Li, Rafael Kioji Vivas Maeda, Zhifei Wang:
Adaptively tolerate power-gating-induced power/ground noise under process variations. DATE 2015: 483-488
Coauthor Index
aka: Rafael K. V. Maeda
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