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ORCIDSankaran M. Menon
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2020 – today
- 2022
[c13]Sankaran M. Menon, Rolf Kühnis:
Special Session: Closed Chassis Platform Debug of Compute Systems using the Functional Ubiquitous USB Type-C Receptacle. VTS 2022: 1-4
2010 – 2019
- 2019
- [c12]Sankaran M. Menon, Ashish Gupta, Chinna Prudvi, Rolf Kühnis, Sukhbinder Singh Takhar, Spencer K. Millican, Eric Rentschler, Pandy Kalimuthu, Preeti Ranjan Panda, Priyadarsan Patra
:
Techniques for Debug of Low Power SoCs. MTV 2019: 45-49
1990 – 1999
- 1997
- [j4]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong:
Operational and Test Performance in the Presence of Built-in Current Sensors. VLSI Design 5(3): 285-298 (1997) - [c11]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana:
Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using IDDQ Testing in BiCMOS and CMOS Circuits. VLSI Design 1997: 545-546 - 1996
- [j3]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana:
Fault Modeling of ECL for High Fault Coverage of Physical Defects. VLSI Design 4(3): 231-242 (1996) - [c10]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Input Pattern Classification for Transistor Level Testing of Bridging Faults in BiCMOS Circuits. Great Lakes Symposium on VLSI 1996: 214-219 - 1995
- [j2]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Rochit Rajsuman:
Testable design of BiCMOS circuits for stuck-open fault detection using single patterns. IEEE J. Solid State Circuits 30(8): 855-863 (1995) - [c9]Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon:
A Novel High-Speed BiCMOS Domino Logic Family. ISCAS 1995: 21-24 - 1994
- [j1]Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong, Sankaran M. Menon:
Resolution Enhancement in IDDQ Testing for Large ICs. VLSI Design 1(4): 277-284 (1994) - [c8]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong:
The Effect of Built-In Current Sensors (BICS) on Operational and Test Performance. VLSI Design 1994: 187-190 - [c7]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Input pattern classification for transistor level testing of BiCMOS circuits. VTS 1994: 457-462 - 1993
- [c6]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Test Generation for BiCMOS Circuits. ISCAS 1993: 1987-1990 - [c5]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Testable design for BiCMOS stuck-open fault detection. VTS 1993: 296-302 - 1992
- [c4]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
On Bridging Faults in ECL Circuits. VLSI Design 1992: 55-60 - [c3]Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana:
Behavior of faulty single BJT BiCMOS logic gates. VTS 1992: 315-320 - 1991
- [c2]Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya:
Gate level representation of ECL circuits for fault modeling. Great Lakes Symposium on VLSI 1991: 330-331 - [c1]Yashwant K. Malaiya, Anura P. Jayasumana, Qiao Tong, Sankaran M. Menon:
Enhancement of resolution in supply current based testing for large ICs. VTS 1991: 291-296
Coauthor Index
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