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Pallav Gupta
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2010 – 2019
- 2018
- [c12]Pallav Gupta:
An Effective Methodology for Automated Diagnosis of Functional Pattern Failures to Support Silicon Debug. ITC 2018: 1-8 - [c11]I-De Huang, Pallav Gupta, Loganathan Lingappan, Vijay Gangaram:
Online Scan Diagnosis : A Novel Approach to Volume Diagnosis. ITC 2018: 1-10 - 2015
- [j10]Hao Liang
, Wei Zhang
, Jiale Huang, Shengqi Yang, Pallav Gupta:
Leveraging Hotspots and Improving Chip Reliability via Carbon Nanotube Grid Thermal Structure. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 731-742 (2015) - 2013
- [j9]Shengqi Yang, Wenping Wang, Mark Hagan, Wei Zhang
, Pallav Gupta, Yu Cao
:
NBTI-aware circuit node criticality computation. ACM J. Emerg. Technol. Comput. Syst. 9(3): 23:1-23:19 (2013) - 2012
- [j8]Jiale Huang, Minhao Zhu, Shengqi Yang, Pallav Gupta, Wei Zhang
, Steven M. Rubin, Gilda Garretón, Jin He:
A physical design tool for carbon nanotube field-effect transistor circuits. ACM J. Emerg. Technol. Comput. Syst. 8(3): 25:1-25:20 (2012) - [j7]Shengqi Yang, Pallav Gupta, Marilyn Wolf, Dimitrios N. Serpanos
, Vijaykrishnan Narayanan, Yuan Xie:
Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling. ACM Trans. Embed. Comput. Syst. 11(3): 62:1-62:16 (2012) - [c10]Naghmeh Karimi, Krishnendu Chakrabarty
, Pallav Gupta, Srinivas Patil:
Test generation for clock-domain crossing faults in integrated circuits. DATE 2012: 406-411 - 2011
- [j6]Xiaofang (Maggie) Wang, Pallav Gupta:
Resource-constrained multiprocessor synthesis for floating-point applications on FPGAs. ACM Trans. Design Autom. Electr. Syst. 16(4): 41:1-41:29 (2011) - [c9]Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty
, Pallav Gupta, Srinivas Patil:
Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip. Asian Test Symposium 2011: 7-14 - [c8]Wei Zhang
, Jiale Huang, Shengqi Yang, Pallav Gupta:
Case study: Alleviating hotspots and improving chip reliability via carbon nanotube thermal interface. DATE 2011: 1071-1076
2000 – 2009
- 2008
- [j5]Pallav Gupta, Rui Zhang, Niraj K. Jha:
Automatic Test Generation for Combinational Threshold Logic Networks. IEEE Trans. Very Large Scale Integr. Syst. 16(8): 1035-1045 (2008) - 2007
- [j4]Rui Zhang, Pallav Gupta, Niraj K. Jha:
Majority and Minority Network Synthesis With Application to QCA-, SET-, and TPL-Based Nanotechnologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(7): 1233-1245 (2007) - [j3]Pallav Gupta, Niraj K. Jha, Loganathan Lingappan:
A Test Generation Framework for Quantum Cellular Automata Circuits. IEEE Trans. Very Large Scale Integr. Syst. 15(1): 24-36 (2007) - 2006
- [j2]Pallav Gupta, Abhinav Agrawal, Niraj K. Jha:
An Algorithm for Synthesis of Reversible Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2317-2330 (2006) - [c7]Pallav Gupta, Niraj K. Jha, Loganathan Lingappan:
Test generation for combinational quantum cellular automata (QCA) circuits. DATE 2006: 311-316 - 2005
- [j1]Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha:
Threshold network synthesis and optimization and its application to nanotechnologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 107-118 (2005) - [c6]Pallav Gupta, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha:
Efficient fingerprint-based user authentication for embedded systems. DAC 2005: 244-247 - [c5]Rui Zhang, Pallav Gupta, Niraj K. Jha:
Synthesis of Majority and Minority Networks and Its Applications to QCA, TPL and SET Based Nanotechnologies. VLSI Design 2005: 229-234 - 2004
- [c4]Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha:
Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies. DATE 2004: 904-909 - [c3]Pallav Gupta, Niraj K. Jha:
An Algorithm for Nano-Pipelining of Circuits and Architectures for a Nanotechnology. DATE 2004: 974-979 - [c2]Pallav Gupta, Rui Zhang, Niraj K. Jha:
An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks. ICCD 2004: 540-543 - 2003
- [c1]Pallav Gupta, Lin Zhong, Niraj K. Jha:
A High-level Interconnect Power Model for Design Space Exploration. ICCAD 2003: 551-559
Coauthor Index
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