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2020 – today
- 2023
[c25]Ebelechukwu Esimai
, Marly Roncken:
Flexible Compilation and Refinement of Asynchronous Circuits. ASYNC 2023: 109-119- 2022
- [j8]Ebelechukwu Esimai, Marly Roncken:
Flexible Active-Passive and Push-Pull Protocols. IEEE Embed. Syst. Lett. 14(3): 139-142 (2022)
2010 – 2019
- 2019
- [j7]Swetha Mettala Gilla, Marly Roncken, Ivan E. Sutherland, Xiaoyu Song:
Mutual Exclusion Sizing for Hoi Polloi. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 1038-1042 (2019) - [c24]Cuong K. Chau, Warren A. Hunt Jr., Matt Kaufmann, Marly Roncken, Ivan E. Sutherland:
A Hierarchical Approach to Self-Timed Circuit Verification. ASYNC 2019: 105-113 - 2018
- [c23]Cuong K. Chau, Warren A. Hunt Jr., Matt Kaufmann, Marly Roncken, Ivan E. Sutherland:
Data-Loop-Free Self-Timed Circuit Verification. ASYNC 2018: 51-58 - 2017
- [c22]Marly Roncken, Ivan E. Sutherland, Chris Chen, Yong Hei, Warren A. Hunt Jr., Cuong K. Chau, Swetha Mettala Gilla, Hoon Park, Xiaoyu Song, Anping He, Hong Chen:
How to think about self-timed systems. ACSSC 2017: 1597-1604 - [c21]Cuong K. Chau, Warren A. Hunt Jr., Marly Roncken, Ivan E. Sutherland:
A Framework for Asynchronous Circuit Modeling and Verification in ACL2. Haifa Verification Conference 2017: 3-18 - 2016
- [j6]Hoon Park, Anping He, Marly Roncken, Xiaoyu Song, Ivan E. Sutherland:
Modular Timing Constraints for Delay-Insensitive Systems. J. Comput. Sci. Technol. 31(1): 77-106 (2016) - 2015
- [c20]Marly Roncken, Swetha Mettala Gilla, Hoon Park, Navaneeth Jamadagni, Chris Cowan, Ivan E. Sutherland:
Naturalized Communication and Testing. ASYNC 2015: 77-84 - 2010
- [c19]Swetha Mettala Gilla, Marly Roncken, Ivan E. Sutherland:
Long-Range GasP with Charge Relaxation. ASYNC 2010: 185-195 - [c18]Prasad Joshi, Peter A. Beerel, Marly Roncken, Ivan E. Sutherland:
Timing Verification of GasP Asynchronous Circuits: Predicted Delay Variations Observed by Experiment. Concurrency, Compositionality, and Correctness 2010: 260-276
2000 – 2009
- 2007
- [j5]Peter A. Beerel, Marly Roncken:
Low Power and Energy Efficient Asynchronous Design. J. Low Power Electron. 3(3): 234-253 (2007) - [c17]Andrew M. Scott, Mark E. Schuelein, Marly Roncken, Jin-Jer Hwan, John Bainbridge, John R. Mawer, David L. Jackson, Andrew Bardsley:
Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus. ASYNC 2007: 60-72 - 2004
- [c16]John O'Leary, Marly Roncken:
Rob Tristan Gerth: 1956?2003. CAV 2004: 1-14 - 2001
- [j4]Kenneth S. Stevens, Shai Rotem, Ran Ginosar, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun, Rakefet Kol, Charles Dike, Marly Roncken:
An asynchronous instruction length decoder. IEEE J. Solid State Circuits 36(2): 217-228 (2001) - 2000
- [c15]Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri:
CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. ASYNC 2000: 62-72 - [c14]Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen, Marly Roncken:
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits. ASYNC 2000: 73- - [c13]Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, Parimal Pal Chaudhuri, Rob Roy:
Fsimac: a fault simulator for asynchronous sequential circuits. Asian Test Symposium 2000: 114-119
1990 – 1999
- 1999
- [j3]Marly Roncken:
Defect-oriented testability for asynchronous ICs. Proc. IEEE 87(2): 363-375 (1999) - [c12]Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun:
RAPPID: An Asynchronous Instruction Length Decoder. ASYNC 1999: 60-70 - [c11]Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken:
CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121 - 1996
- [c10]Marly Roncken, Eric Bruls:
Test Quality of Asynchronous Circuits: A Defect-oriented Evaluation. ITC 1996: 205-214 - [c9]Marly Roncken, Emile H. L. Aarts, Wim F. J. Verhaegh:
Optimal Scan for Pipelined Testing: An Asynchronous Foundation. ITC 1996: 215-224 - [c8]Marly Roncken:
Asynchronous Design: Working the Fast Lane. ITC 1996: 939 - 1995
- [c7]Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Ad M. G. Peeters, Marly Roncken, Frits D. Schalij, Rik van de Wiel:
A single-rail re-implementation of a DCC error detector using a generic standard-cell library. ASYNC 1995: 72- - 1994
- [j2]Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Marly Roncken, Frits D. Schalij, Ad M. G. Peeters:
Asynchronous Circuits for Low Power: A DCC Error Corrector. IEEE Des. Test Comput. 11(2): 22-32 (1994) - [j1]Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Ad M. G. Peeters, Marly Roncken, Frits D. Schalij:
A fully asynchronous low-power error corrector for the DCC player. IEEE J. Solid State Circuits 29(12): 1429-1439 (1994) - [c6]Marly Roncken:
Partial scan test for asynchronous circuits illustrated on a DCC error corrector. ASYNC 1994: 247-256 - 1993
- [c5]Marly Roncken, Ronald Saeijs:
Linear Test Times for Delay-Insensitive Circuits: a Compilation Strategy. Asynchronous Design Methodologies 1993: 13-27 - [c4]Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Marly Roncken, Frits D. Schalij:
Characterization and Evaluation of a Compiled Asynchronous IC. Asynchronous Design Methodologies 1993: 209-221 - 1991
- [c3]Kees van Berkel, Joep L. W. Kessels, Marly Roncken, Ronald Saeijs, Frits D. Schalij:
The VLSI-programming language tangram and its translation into handshake circuits. EURO-DAC 1991: 384-389
1980 – 1989
- 1982
- [c2]Rob Gerth, Willem P. de Roever, Marly Roncken:
Procedures and concurrency: A study in proof. Symposium on Programming 1982: 132-163 - 1981
- [c1]Marly Roncken, Rob Gerth, Willem P. de Roever:
A Proof System for Brinch Hansen's Distributed Processes. GI Jahrestagung 1981: 88-95
Coauthor Index
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