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Mario García-Valderas
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2020 – today
- 2023
- [j9]Luis Entrena
, Antonio J. Sanchez-Clemente
, Luis Ángel García-Astudillo
, Marta Portela-García, Mario García-Valderas
, Almudena Lindoso
, Roberto Sarmiento
:
Formal Verification of Fault-Tolerant Hardware Designs. IEEE Access 11: 116127-116140 (2023) - [c30]Alberto Ramírez-Bárcenas, Mario García-Valderas, Celia López-Ongil:
Design Space Analysis for a Digital Lock-In Amplifier for Infrared Gas Sensor Signal Acquisition. DCIS 2023: 1-6 - 2022
- [j8]Alba Páez-Montoro
, Mario García-Valderas
, Emilio Olías-Ruíz, Celia López-Ongil
:
Solar Energy Harvesting to Improve Capabilities of Wearable Devices. Sensors 22(10): 3950 (2022) - [c29]Iñigo Mikel Lasaga Arana, Alberto Ramírez-Bárcenas, Mario García-Valderas, Celia López-Ongil:
Low Power Consumption Online Testing Technique for Wearable Wireless Body Area Networks. DCIS 2022: 1-6 - 2020
- [c28]Alberto Ramírez-Bárcenas, Marta Portela-García, Mario García-Valderas, Celia López-Ongil
:
System Dependability in Edge Computing Wearable Devices. DCIS 2020: 1-6
2010 – 2019
- 2019
- [c27]Aranzazu Fernandez-Alvarez, Marta Portela-García, Mario García-Valderas, Celia López-Ongil
, Samuel Sordo Ibáñez, Servando Espejo-Meana:
Assessing SET Sensitivity of Mixed-Signal Circuits at Early Design Stages. DCIS 2019: 1-6 - 2018
- [j7]Manuel Peña-Fernandez, Almudena Lindoso
, Luis Entrena
, Mario García-Valderas
, S. Philippe, Yolanda Morilla, Pedro Martín-Holgado
:
PTM-based hybrid error-detection architecture for ARM microprocessors. Microelectron. Reliab. 88-90: 925-930 (2018) - [c26]Jose Angel Miranda Calero, Rodrigo Marino, José Manuel Lanza-Gutiérrez, Teresa Riesgo, Mario García-Valderas
, Celia López-Ongil
:
Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals. DCIS 2018: 1-6 - 2017
- [c25]Jose Angel Miranda, Anna Vaskova, Marta Portela-García, Mario García-Valderas
, Celia López-Ongil
:
On-line testing of sensor networks: A case study. IOLTS 2017: 201-202 - 2014
- [j6]M. Arévalo-Garbayo, Marta Portela-García
, Mario García-Valderas
, Celia López-Ongil
, Luis Entrena
:
A method to assess the robustness of cryptographic circuits at the design stage. Microelectron. J. 45(10): 1354-1360 (2014) - [c24]Antonio Sanchez-Clemente, Luis Entrena
, Mario García-Valderas
:
Error masking with approximate logic circuits using dynamic probability estimations. IOLTS 2014: 134-139 - [c23]Anna Vaskova, Marta Portela-García
, Mario García-Valderas
, Celia López-Ongil
, Matteo Sonza Reorda
:
Permanent faults on LIN networks: On-line test generation. IOLTS 2014: 176-181 - [c22]Anna Vaskova, A. Fabregat, Marta Portela-García
, Mario García-Valderas
, Celia López-Ongil
, Matteo Sonza Reorda
:
Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques. LATW 2014: 1-6 - 2012
- [j5]Marta Portela-García
, Almudena Lindoso
, Luis Entrena
, Mario García-Valderas
, Celia López-Ongil
, N. Marroni, Bernardo Pianta, Letícia Maria Bolzani Poehls, Fabian Vargas:
Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach. J. Electron. Test. 28(6): 777-789 (2012) - [j4]Marta Portela-García
, Michelangelo Grosso
, M. Gallardo-Campos, Matteo Sonza Reorda
, Luis Entrena
, Mario García-Valderas
, Celia López-Ongil
:
On the use of embedded debug features for permanent and transient fault resilience in microprocessors. Microprocess. Microsystems 36(5): 334-343 (2012) - [j3]Luis Entrena
, Mario García-Valderas
, Raúl Fernández Cardenal, Almudena Lindoso
, Marta Portela-García
, Celia López-Ongil
:
Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection. IEEE Trans. Computers 61(3): 313-322 (2012) - [c21]Antonio Sanchez-Clemente, Luis Entrena
, Mario García-Valderas
, Celia López-Ongil
:
Logic masking for SET Mitigation Using Approximate Logic Circuits. IOLTS 2012: 176-181 - [c20]Celia López-Ongil
, Marta Portela-García
, Mario García-Valderas
, Anna Vaskova, Luis Entrena
, Joaquín Rivas-Abalo, Alberto Martín-Ortega
, Javier Martinez-Oter, S. Rodriguez-Bustabad, Ignacio Arruego
:
SEU sensitivity of robust communication protocols. IOLTS 2012: 188-193 - 2011
- [j2]Marta Portela-García
, Celia López-Ongil
, Mario García-Valderas
, Luis Entrena
:
Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures. IEEE Trans. Dependable Secur. Comput. 8(2): 308-314 (2011) - [c19]Anna Vaskova, Celia López-Ongil
, Mario García-Valderas
, Marta Portela-García
, Luis Entrena
:
Evaluation techniques for on-line testing of robust systems based on critical tasks distribution. IOLTS 2011: 258-263 - [c18]Marta Portela-García
, Almudena Lindoso
, Luis Entrena
, Mario García-Valderas
, Celia López-Ongil
, Bernardo Pianta, Letícia Maria Bolzani Poehls, Fabian Vargas:
Using an FPGA-based fault injection technique to evaluate software robustness under SEEs: A case study. LATW 2011: 1-6 - 2010
- [c17]Michelangelo Grosso
, Matteo Sonza Reorda
, Marta Portela-García
, Mario García-Valderas
, Celia López-Ongil
, Luis Entrena
:
An on-line fault detection technique based on embedded debug features. IOLTS 2010: 167-172
2000 – 2009
- 2009
- [j1]Mario García-Valderas
, Luis Entrena
, Raúl Fernández Cardenal, Celia López-Ongil
, Marta Portela-García
:
SET Emulation Under a Quantized Delay Model. J. Electron. Test. 25(1): 107-116 (2009) - [c16]Mario García-Valderas
, Marta Portela-García
, Celia López-Ongil
, Luis Entrena
:
In-depth analysis of digital circuits against soft errors for selective hardening. IOLTS 2009: 144-149 - [c15]Fabian Vargas, Claudia A. Rocha, Bernardo Pianta, Marta Portela-García, Celia López-Ongil
, Mario García-Valderas
, Luis Entrena
:
Briefing power/reliability optimization in embedded software design. IOLTS 2009: 185-186 - [c14]Alejandro Jiménez-Horas, Enrique San Millán, Celia López-Ongil
, Marta Portela-García
, Mario García-Valderas
, Luis Entrena
:
Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers. IOLTS 2009: 203-205 - [c13]Marta Portela-García
, Mario García-Valderas
, Celia López-Ongil
, Luis Entrena
, B. Lestriez, Luis Berrojo:
Study of SEU effects in a Turbo Decoder Bit Error Rate. LATW 2009: 1-5 - 2008
- [c12]Celia López-Ongil
, Alejandro Jiménez-Horas, Marta Portela-García
, Mario García-Valderas
, Enrique San Millán, Luis Entrena
:
Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard. IOLTS 2008: 167-168 - 2007
- [c11]Mario García-Valderas
, Raúl Fernández Cardenal, Celia López-Ongil
, Marta Portela-García
, Luis Entrena
:
SET Emulation Under a Quantized Delay Model. DFT 2007: 68-77 - [c10]Marta Portela-García
, Celia López-Ongil
, Mario García-Valderas
, Luis Entrena
:
A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors. IOLTS 2007: 101-106 - [i1]Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes:
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation. CoRR abs/0710.4757 (2007) - 2006
- [c9]Mario García-Valderas
, Marta Portela-García
, Celia López-Ongil
, Luis Entrena-Arrontes
:
An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories. DDECS 2006: 218-219 - [c8]Mario García-Valderas
, Marta Portela-García
, Celia López-Ongil
, Luis Entrena
:
Emulation-based Fault Injection in Circuits with Embedded Memories. IOLTS 2006: 183-184 - [c7]S. Torrellas, Bogdan Nicolescu, Raul Velazco, Mario García-Valderas, Yvon Savaria:
Validation by Fault Injection of a Software Error Detection Technique Dealing with Critical Single Event Upsets. LATW 2006: 111-116 - 2005
- [c6]Celia López-Ongil
, Mario García-Valderas
, Marta Portela-García
, Luis Entrena-Arrontes
:
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation. DATE 2005: 308-309 - [c5]Celia López-Ongil
, Mario García-Valderas
, Marta Portela-García
, Luis Entrena-Arrontes
:
An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation. FPL 2005: 397-402 - [c4]Celia López-Ongil
, Mario García-Valderas
, Marta Portela-García
, Luis Entrena-Arrontes
:
Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading. IOLTS 2005: 43-48 - 2004
- [c3]Michael G. Lorenz, Luis Mengibar, Mario García-Valderas, Luis Entrena:
Power Consumption Reduction Through Dynamic Reconfiguration. FPL 2004: 751-760 - [c2]Mario García-Valderas, Eduardo de la Torre, F. Ariza, Teresa Riesgo:
Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion. FPL 2004: 1057-1061 - [c1]Mario García-Valderas, Celia López-Ongil, Marta Portela-García, Luis Entrena:
Transient Fault Emulation of Hardened Circuits in FPGA Platforms. IOLTS 2004: 109-114
Coauthor Index
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