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Yinghua Min
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2010 – 2019
- 2011
- [j23]Ying Zhang, Huawei Li, Yinghua Min, Xiaowei Li:
Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1787-1800 (2011) - 2010
- [j22]Ruilian Zhao, Michael R. Lyu, Yinghua Min:
Automatic string test data generation for detecting domain errors. Softw. Test. Verification Reliab. 20(3): 209-236 (2010)
2000 – 2009
- 2009
- [c32]Jie Wang, Huawei Li
, Yinghua Min, Xiaowei Li, Huaguo Liang:
Impact of Hazards on Pattern Selection for Small Delay Defects. PRDC 2009: 49-54 - 2008
- [c31]Guangxing Zhang, Gaogang Xie, Jianhua Yang, Yinghua Min, Zhaomin Zhou, Xiaodong Duan:
Accurate Online Traffic Classification with Multi-Phases Identification Methodology. CCNC 2008: 141-146 - 2007
- [c30]Jacob Abraham, Salvador Mir, Yinghua Min, Jeremy Wang, Cheng-Wen Wu:
Test Education in the Global Economy. ATS 2007: 53 - [c29]Kun Xie, Yinghua Min, Dafang Zhang, Jigang Wen, Gaogang Xie:
A Scalable Bloom Filter for Membership Queries. GLOBECOM 2007: 543-547 - [c28]Gaogang Xie, Guangxing Zhang, Jianhua Yang, Yinghua Min, Valérie Issarny, Alberto Conte:
Survey on Traffic of Metro Area Network with Measurement On-Line. ITC 2007: 666-677 - 2005
- [j21]Jie Wu, Feng Gao, Zhongcheng Li, Yinghua Min:
Optimal, and reliable communication in hypercubes using extended safety vectors. IEEE Trans. Reliab. 54(3): 402-411 (2005) - [c27]Yuan-sheng Luo, Dafang Zhang, Yinghua Min:
An Improved Scheme of Index-Based Checkpointing. PRDC 2005: 167-174 - 2004
- [j20]Debesh K. Das, Hideo Fujiwara, Yungang Li, Yinghua Min, Shiyi Xu, Yervant Zorian:
Design & Test Education in Asia. IEEE Des. Test Comput. 21(4): 331-338 (2004) - 2003
- [j19]Jianhui Jiang, Yinghua Min, Chenglian Peng:
Fault-Tolerant Systems with Concurrent Error-Locating Capability. J. Comput. Sci. Technol. 18(2): 190-200 (2003) - [j18]Jishun Kuang, Zhiqiang Yang, Qijian Zhu, Yinghua Min:
IDDT: Fundamentals and Test Generation. J. Comput. Sci. Technol. 18(3): 299-307 (2003) - [j17]Zhigang Yin, Yinghua Min, Xiaowei Li, Huawei Li
:
A Novel RT-Level Behavioral Description Based ATPG Method. J. Comput. Sci. Technol. 18(3): 308-317 (2003) - [c26]Ruilian Zhao, Michael R. Lyu, Yinghua Min:
Domain Testing Based on Character String Predicate. Asian Test Symposium 2003: 96-101 - [c25]Yinghua Min, Jishun Kuang, Xiaoyan Niu:
At-Speed Current Testing. Asian Test Symposium 2003: 396-399 - [c24]Ruilian Zhao, Michael R. Lyu, Yinghua Min:
A New Software Testing Approach Based on Domain Analysis of Specifications and Programs. ISSRE 2003: 60-70 - 2002
- [j16]Zuying Luo, Yinghua Min, Shiyuan Yang, Xiaowei Li:
The monotonic increasing relationship between average powers of CMOS VLSI circuits with and without delay and its applications. Sci. China Ser. F Inf. Sci. 45(6): 401-415 (2002) - [j15]Huawei Li, Yinghua Min, Zhongcheng Li:
Clustering of behavioral phases in FSMs and its applications to VLSI test. Sci. China Ser. F Inf. Sci. 45(6): 462-478 (2002) - [j14]Yinghua Min:
Why RTL ATPG? J. Comput. Sci. Technol. 17(2): 113-117 (2002) - [c23]Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min:
Test Power Optimization Techniques for CMOS Circuits. Asian Test Symposium 2002: 332-337 - 2001
- [j13]Dafang Zhang, Gaogang Xie, Yinghua Min:
Node Grouping in System-Level Fault Diagnosis. J. Comput. Sci. Technol. 16(5): 474-479 (2001) - [c22]Huawei Li, Yinghua Min, Zhongcheng Li:
An RT-Level ATPG Based on Clustering of Circuit States. Asian Test Symposium 2001: 213-218 - [c21]Zhigang Yin, Yinghua Min, Xiaowei Li:
An Approach to RTL Fault Extraction and Test Generation. Asian Test Symposium 2001: 219-224 - [c20]Xiaowei Li, Huawei Li, Yinghua Min:
Reducing Power Dissipation during At-Speed Test Application. DFT 2001: 116- - 2000
- [j12]Huawei Li
, Zhongcheng Li, Yinghua Min:
Reduction of Number of Paths to be Tested in Delay Testing. J. Electron. Test. 16(5): 477-485 (2000) - [c19]Lijian Li, Xiaoyang Yu, Cheng-Wen Wu, Yinghua Min:
A waveform simulator based on Boolean process. Asian Test Symposium 2000: 145-150 - [c18]Lijian Li, Yinghua Min:
An efficient BIST design using LFSR-ROM architecture. Asian Test Symposium 2000: 386- - [c17]Jie Wu, Feng Gao, Zhongcheng Li, Yinghua Min:
Optimal Fault-Tolerant Routing in Hypercubes Using Extended Safety Vectors. ICPADS 2000: 264-271
1990 – 1999
- 1999
- [j11]Yinghua Min, Zhongcheng Li:
An analytical delay model. J. Comput. Sci. Technol. 14(2): 97-115 (1999) - [c16]Jianhui Jiang, Hongbao Shi, Yinghua Min, Xiaodong Zhao:
A Novel NMR Structure with Concurrent Error Location Capabilities. PRDC 1999: 32-39 - 1998
- [j10]Yinghua Min, Zhongcheng Li:
IDDT Testing versus IDDQ Testing. J. Electron. Test. 13(1): 51-55 (1998) - [j9]Yingquan Zhou, Mike W. T. Wong, Yinghua Min:
On concurrent multiple error diagnosability in linear analog circuits using continuous checksum. Int. J. Circuit Theory Appl. 26(1): 53-64 (1998) - [c15]Zhongcheng Li, Yinghua Min, Robert K. Brayton:
A New Low-Cost Method for Identifying Untestable Path Delay Faults. Asian Test Symposium 1998: 76-81 - [c14]Huawei Li, Zhongcheng Li, Yinghua Min:
Delay Testing with Double Observations. Asian Test Symposium 1998: 96- - 1997
- [j8]Zhuxing Zhao, Yinghua Min, Zhongcheng Li:
Path sensitization. J. Comput. Sci. Technol. 12(3): 271-282 (1997) - [j7]Wangning Long, Yinghua Min, Shiyuan Yang, Shibai Tong:
Short-time scaling of variable ordering of OBDDs. J. Comput. Sci. Technol. 12(4): 366-371 (1997) - [c13]Wangning Long, Shiyuan Yang, Zhongcheng Li, Yinghua Min:
Memory Efficient ATPG for Path Delay Faults. Asian Test Symposium 1997: 326-331 - [c12]Xiaoming Yu, Yinghua Min:
Design of delay-verifiable combinational logic by adding extra inputs. Asian Test Symposium 1997: 332- - [c11]Yinghua Min, Zhuxing Zhao, Zhongcheng Li:
IDDT Testing. Asian Test Symposium 1997: 378-383 - [c10]Zhongcheng Li, Yuhong Zhao, Yinghua Min, Robert K. Brayton:
Timed Binary Decision Diagrams. ICCD 1997: 352-357 - [c9]Zhongcheng Li, Robert K. Brayton, Yinghua Min:
Efficient Identification of Non-Robustly Untestable Path Delay Faults. ITC 1997: 992-997 - 1996
- [j6]Yingquan Zhou, Mike W. T. Wong, Yinghua Min:
Hardware reduction in continuous checksum-based analog checkers: Algorithm and its analysis. J. Electron. Test. 9(1-2): 153-163 (1996) - [j5]Yingquan Zhou, Yinghua Min:
A kind of Multistage Interconnection Networks with multiple paths. J. Comput. Sci. Technol. 11(4): 395-404 (1996) - [c8]Zhuxing Zhao, Zhongcheng Li, Yinghua Min:
Waveform Polynomial Manipulation Using Bdds. Asian Test Symposium 1996: 136-141 - [c7]Yinghua Min, Zhuxing Zhao, Zhongcheng Li:
An Analytical Delay Model Based on Boolean Process. VLSI Design 1996: 162-165 - 1995
- [j4]Youli Min, Yinghua Min:
A fault-tolerant and heuristic routing algorithm for faulty hypercubes. J. Comput. Sci. Technol. 10(6): 536-544 (1995) - [c6]Yinghua Min, Zhuxing Zhao, Zhongcheng Li:
Boolean process-an analytical approach to circuit representation (II). Asian Test Symposium 1995: 26-32 - [c5]Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, Sandip Kundu, Chung-Len Lee, Yinghua Min, Parimal Pal Chaudhuri:
Panel: New Research Problems in the Emerging Test Technology. Asian Test Symposium 1995: 189-190 - [c4]Yingquan Zhou, Mike W. T. Wong, Yinghua Min:
Feasibility and Effectiveness of the Algorithm for Overhead Reduction in Analog Checkers. FTCS 1995: 238-247 - 1994
- [c3]Yinghua Min, Yutang Zhou, Zhongcheng Li, Cheng Ye, Yuqi Pan:
Behavioral Design and Prototyping of a Fail-Safe System. VLSI Design 1994: 159-162 - 1993
- [c2]Yinghua Min, Zhongcheng Li:
Evaluation of test generation algorithms. VTS 1993: 348-350 - 1991
- [j3]Yinghua Min, Yashwant K. Malaiya, Boping Jin:
Analysis of Detection Capability of Parallel Signature Analyzers. IEEE Trans. Computers 40(9): 1075-1081 (1991)
1980 – 1989
- 1988
- [j2]Yinghua Min, Jintao Li:
Strongly fault secure PLAs and totally self-checking checkers. IEEE Trans. Computers 37(6): 863-867 (1988) - 1986
- [j1]Yinghua Min, Zhongcheng Li:
Pseudo-Exhaustive Testing Strategy for Large Combinational Circuits. Comput. Syst. Sci. Eng. 1(4): 213-220 (1986) - 1982
- [c1]Yinghua Min, Stephen Y. H. Su:
Testing functional faults in VLSI. DAC 1982: 384-392
Coauthor Index
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