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ORCIDEduard Säckinger
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2010 – 2019
- 2012
[j15]Eduard Säckinger:
On the Noise Optimum of FET Broadband Transimpedance Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(12): 2881-2889 (2012)- 2011
- [j14]Eduard Säckinger:
On the Excess Noise Factor Gamma of a FET Driven by a Capacitive Source. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2118-2126 (2011) - 2010
- [j13]Eduard Säckinger:
The Transimpedance Limit. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1848-1856 (2010)
2000 – 2009
- 2006
- [j12]Jinghong Chen, Fadi Saibi
, Eduard Säckinger, Joseph H. Othmer, Meng-Lin (Mark) Yu, Fuji Yang, Jenshan Lin, Titus Huang, Tingping Liu, Kamran Azadet:
A Multi-Carrier QAM Transceiver for Ultra-Wideband Optical Communication. IEEE J. Solid State Circuits 41(8): 1876-1893 (2006) - [j11]Eduard Säckinger, Aner Tennen, Dima Shulman, Barkat Wani, Marta Rambaud, Drahoslav Lím, Fred Larsen, George S. Moschytz:
A 5-V AC-Powered CMOS Filter-Selectivity Booster for POTS/ADSL Splitter Size Reduction. IEEE J. Solid State Circuits 41(12): 2877-2884 (2006) - [c8]Eduard Säckinger, Aner Tennen, Dima Shulman, Barkat Wani, Marta Rambaud, Drahoslav Lím, Fred Larsen, George S. Moschytz:
A 5V AC-Powered CMOS Filter-Selectivity Booster for POTS/ADSL Splitter Size Reduction. ISSCC 2006: 2072-2081 - 2005
- [c7]Jinghong Chen, Fadi Saibi, Eduard Säckinger, Kamran Azadet, Joe Othmer, Mark Yu, Fuji Yang, Jenshan Lin, Titus Huang, Tingping Liu:
An integrated CMOS transceiver for a 40Gb/s SCM optical communication system. CICC 2005: 135-138 - 2000
- [j10]Eduard Säckinger, Yusuke Ota, Thaddeus J. Gabara, Wilhelm C. Fischer:
A 15-mW, 155-Mb/s CMOS burst-mode laser driver with automatic power control and end-of-life detection. IEEE J. Solid State Circuits 35(2): 269-275 (2000) - [j9]Bryan D. Ackland, A. Anesko, D. Brinthaupt, S. J. Daubert, Asawaree Kalavade, J. Knobloch, E. Micca, M. Moturi, Chris J. Nicol, Jay H. O'Neill, Joe Othmer, Eduard Sackinger, Kanwar Jit Singh, J. Sweet, C. J. Terman, Joseph Williams:
A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP. IEEE J. Solid State Circuits 35(3): 412-424 (2000) - [j8]Eduard Säckinger, Wilhelm C. Fischer:
A 3-GHz 32-dB CMOS limiting amplifier for SONET OC-48 receivers. IEEE J. Solid State Circuits 35(12): 1884-1888 (2000)
1990 – 1999
- 1999
- [j7]Eduard Säckinger, Yusuke Ota, Thaddeus J. Gabara, Wilhelm C. Fischer:
A 15-mW, 155-Mb/s CMOS burst-mode laser driver with automatic power control and end-of-life detection. IEEE J. Solid State Circuits 34(12): 1944-1950 (1999) - [c6]Bryan D. Ackland, A. Anesko, D. Brinthaupt, S. J. Daubert, Asawaree Kalavade, J. Knobloch, E. Micca, M. Moturi, Chris J. Nicol, Jay H. O'Neill, Joe Othmer, Eduard Sackinger, Kanwar Jit Singh, J. Sweet, C. J. Terman, Joseph Williams:
A single-chip 1.6 billion 16-b MAC/s multiprocessor DSP. CICC 1999: 537-540 - 1997
- [c5]Eduard Säckinger:
Measurement of Finite-Precision Effects in Handwriting- and Speech-Recognition Algorithms. ICANN 1997: 1223-1228 - 1996
- [j6]Eduard Sackinger:
Neural Information Processing and VLSI [Book Review]. IEEE Commun. Mag. 34(3): 14 (1996) - [j5]Eduard Säckinger, Hans Peter Graf:
A board system for high-speed image analysis and neural networks. IEEE Trans. Neural Networks 7(1): 214-221 (1996) - 1994
- [c4]Léon Bottou, Corinna Cortes, John S. Denker, Harris Drucker, Isabelle Guyon, Larry D. Jackel, Yann LeCun, Urs A. Müller, Eduard Säckinger, Patrice Y. Simard, Vladimir Vapnik:
Comparison of classifier methods: a case study in handwritten digit recognition. ICPR (2) 1994: 77-82 - 1993
- [j4]Jane Bromley, James W. Bentz, Léon Bottou, Isabelle Guyon, Yann LeCun, Cliff Moore, Eduard Säckinger, Roopak Shah:
Signature Verification Using A "Siamese" Time Delay Neural Network. Int. J. Pattern Recognit. Artif. Intell. 7(4): 669-688 (1993) - [j3]Hans Peter Graf, Eduard Säckinger, Lawrence D. Jackel:
Recent developments of electronic neural nets in North America. J. VLSI Signal Process. 6(1): 19-31 (1993) - [c3]Jane Bromley, Isabelle Guyon, Yann LeCun, Eduard Säckinger, Roopak Shah:
Signature Verification Using a Siamese Time Delay Neural Network. NIPS 1993: 737-744 - 1992
- [j2]Bernhard E. Boser, Eduard Säckinger, Jane Bromley, Yann LeCun, Lawrence D. Jackel:
Hardware requirements for neural network pattern classifiers: a case study and implementation. IEEE Micro 12(1): 32-40 (1992) - [j1]Eduard Säckinger, Bernhard E. Boser, Jane Bromley, Yann LeCun, Lawrence D. Jackel:
Application of the ANNA neural network chip to high-speed character recognition. IEEE Trans. Neural Networks 3(3): 498-505 (1992) - 1991
- [c2]Lawrence D. Jackel, Charles E. Stenard, Henry S. Baird, Bernhard E. Boser, Jane Bromley, Christopher J. C. Burges, John S. Denker, Hans Peter Graf, Donnie Henderson, Richard E. Howard, Wayne E. Hubbard, Yann LeCun, Ofer Matan, Edwin P. D. Pednault, William Satterfield, Eduard Säckinger, Timothy J. Thompson:
A neural network approach to handprint character recognition. Compcon 1991: 472-475 - [c1]Eduard Säckinger, Bernhard E. Boser, Lawrence D. Jackel:
A Neurocomputer Board Based on the ANNA Neural Network Chip. NIPS 1991: 773-780
Coauthor Index
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