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ACM Transactions on Reconfigurable Technology and Systems, Volume 12
Volume 12, Number 1, April 2018
- Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou:

An Efficient Memory Partitioning Approach for Multi-Pattern Data Access via Data Reuse. 1:1-1:22 - Kaiyuan Guo, Shulin Zeng, Jincheng Yu

, Yu Wang, Huazhong Yang:
[DL] A Survey of FPGA-based Neural Network Inference Accelerators. 2:1-2:26 - Sadegh Yazdanshenas

, Vaughn Betz:
COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures. 3:1-3:27 - Young-kyu Choi

, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei:
In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms. 4:1-4:20 - Shijie Cao, Lanshun Nie, De-chen Zhan, Wenqiang Wang, Ningyi Xu, Ramashis Das, Ming Wu, Lintao Zhang, Derek Chiou:

FlexSaaS: A Reconfigurable Accelerator for Web Search Selection. 5:1-5:20
Volume 12, Number 2, June 2019
- Deming Chen:

Editorial: A Message from the New Editor-in-Chief. - Raghid Morcel

, Hazem M. Hajj, Mazen A. R. Saghir, Haitham Akkary, Hassan Artail, Rahul Khanna
, Anil S. Keshavamurthy:
FeatherNet: An Accelerated Convolutional Neural Network Design for Resource-constrained FPGAs. 6:1-6:27 - Xuegong Zhou

, Lingli Wang, Alan Mishchenko:
Fast Adjustable NPN Classification Using Generalized Symmetries. 7:1-7:16 - Julian Oppermann

, Melanie Reuter-Oppermann
, Lukas Sommer
, Andreas Koch
, Oliver Sinnen
:
Exact and Practical Modulo Scheduling for High-Level Synthesis. 8:1-8:26 - Chunkun Bo, Vinh Dang, Ted Xie, Jack Wadden, Mircea Stan

, Kevin Skadron
:
Automata Processing in Reconfigurable Architectures: In-the-Cloud Deployment, Cross-Platform Evaluation, and Fast Symbol-Only Reconfiguration. 9:1-9:25 - Dinh Van Luan

, Xuan Truong Nguyen
, Hyuk-Jae Lee:
A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation. 10:1-10:21
Volume 12, Number 3, September 2019
- Christophe Bobda, Russell Tessier, Ken Eguro, Ryan Kastner

:
Introduction to the Special Section on Security in FPGA-accelerated Cloud and Datacenters. - Ilias Giechaskiel

, Ken Eguro, Kasper Bonne Rasmussen:
Leakier Wires: Exploiting FPGA Long Wires for Covert- and Side-channel Attacks. 11:1-11:29 - Jonas Krautter

, Dennis R. E. Gnad
, Mehdi Baradaran Tahoori:
Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the Cloud. 12:1-12:26 - Muhammad E. S. Elrabaa

, Mohamed A. Al-Asli, Marwan H. Abu-Amara
:
A Protection and Pay-per-use Licensing Scheme for On-cloud FPGA Circuit IPs. 13:1-13:19 - Jiliang Zhang

, Gang Qu:
Recent Attacks and Defenses on FPGA-based Systems. 14:1-14:24
- Yaman Umuroglu, Davide Conficconi

, Lahiru Rasnayake, Thomas B. Preußer, Magnus Själander
:
Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing. 15:1-15:24 - Abeer Y. Al-Hyari

, Ziad Abuowaimer, Timothy Martin, Gary Gréwal, Shawki Areibi, Anthony Vannelli:
Novel Congestion-estimation and Routability-prediction Methods based on Machine Learning for Modern FPGAs. 16:1-16:25
Volume 12, Number 4, November 2019
- Muhsen Owaida, Amit Kulkarni

, Gustavo Alonso:
Distributed Inference over Decision Tree Ensembles on Clusters of FPGAs. 17:1-17:27 - Jason Gorski, Darrin M. Hanna

:
The FPOA, a Medium-grained Reconfigurable Architecture for High-level Synthesis. 18:1-18:31 - Marco Lattuada

, Fabrizio Ferrandi
:
A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows. 19:1-19:26 - Ibrahim Ahmed

, Shuze Zhao, James Meijers, Olivier Trescases, Vaughn Betz:
FRoC 2.0: Automatic BRAM and Logic Testing to Enable Dynamic Voltage Scaling for FPGA Applications. 20:1-20:28 - Nina Engelhardt, Hayden Kwok-Hay So

:
GraVF-M: Graph Processing System Generation for Multi-FPGA Platforms. 21:1-21:28 - Stephen Tridgell

, Martin Kumm, Martin Hardieck, David Boland, Duncan J. M. Moss, Peter Zipf
, Philip H. W. Leong
:
Unrolling Ternary Neural Networks. 22:1-22:23

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