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2010 – 2019
- 2017
[j4]Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker
, Andreas Weichslgartner, Jürgen Teich:
Efficient task spawning for shared memory and message passing in many-core architectures. J. Syst. Archit. 77: 72-82 (2017)- 2016
- [j3]Vahid Lari, Andreas Weichslgartner, Alexandru Tanase, Michael Witterauf, Faramarz Khosravi, Jürgen Teich, Jan Heißwolf, Stephanie Friederich, Jürgen Becker:
Providing fault tolerance through invasive computing. it Inf. Technol. 58(6): 309-328 (2016) - 2015
- [c18]Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Stephanie Friederich, Leonard Masing, Carsten Stein, Marco Duden, Roman Klopfer, Jürgen Teich, Thomas Wild, Andreas Herkersdorf, Jürgen Becker:
Fault-tolerant communication in invasive networks on chip. AHS 2015: 1-8 - [c17]Aurang Zaib, Jan Heißwolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf:
Network Interface with Task Spawning Support for NoC-Based DSM Architectures. ARCS 2015: 186-198 - [c16]Michael Dreschmann, Jan Heisswolf, Michael Geiger, Manuel Haußecker, Jürgen Becker:
A Framework for Multi-FPGA Interconnection using Multi Gigabit Transceivers. SBCCI 2015: 5:1-5:6 - 2014
- [b1]Jan Heißwolf:
A Scalable and Adaptive Network on Chip for Many-Core Architectures. Karlsruhe Institute of Technology, 2014 - [c15]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. ARCS Workshops 2014: 1-8 - [c14]Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jürgen Teich, Jörg Henkel, Gregor Snelting, Andreas Herkersdorf, Jürgen Becker:
CAP: Communication Aware Programming. DAC 2014: 105:1-105:6 - [c13]Stephanie Friederich, Jan Heisswolf, Jürgen Becker:
Hardware/software debugging of large scale many-core architectures. SBCCI 2014: 45:1-45:7 - 2013
- [j2]Jan Heisswolf, Ralf König, Martin Kupper, Jürgen Becker:
Providing multiple hard latency and throughput guarantees for packet switching networks on chip. Comput. Electr. Eng. 39(8): 2603-2622 (2013) - [j1]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
Virtual networks - distributed communication resource management. ACM Trans. Reconfigurable Technol. Syst. 6(2): 8:1-8:14 (2013) - [c12]Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jürgen Becker, Koen Bertels:
Hybrid interconnect design for heterogeneous hardware accelerators. DATE 2013: 843-846 - [c11]Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf:
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections. DSD 2013: 761-768 - [c10]Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker:
Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS Workshops 2013: 153-162 - [c9]Jan Heisswolf, Maximilian Singh, Martin Kupper, Ralf König, Jürgen Becker:
Rerouting: Scalable NoC self-optimization by distributed hardware-based connection reallocation. ReConFig 2013: 1-8 - [c8]Jan Heisswolf, Simon Bischof, Michael Rückauer, Jürgen Becker:
Efficient memory access in 2D Mesh NoC architectures using high bandwidth routers. SBCCI 2013: 1-6 - [c7]Sascha Roloff, Andreas Weichslgartner, Jan Heißwolf, Frank Hannig, Jürgen Teich:
NoC simulation in heterogeneous architectures for PGAS programming model. M-SCOPES 2013: 77-85 - 2012
- [c6]Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe:
Invasive manycore architectures. ASP-DAC 2012: 193-200 - [c5]Jürgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf König, David May:
Hardware prototyping of novel invasive multicore architectures. ASP-DAC 2012: 201-206 - [c4]Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker:
Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IPDPS Workshops 2012: 234-241 - [c3]Jan Heisswolf, Ralf König, Jürgen Becker:
A Scalable NoC Router Design Providing QoS Support Using Weighted Round Robin Scheduling. ISPA 2012: 625-632 - 2011
- [c2]Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker:
A Scalable Microarchitecture Design that Enables Dynamic Code Execution for Variable-Issue Clustered Processors. IPDPS Workshops 2011: 150-157 - [c1]Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker:
Architecture design space exploration of run-time scalable issue-width processors. ICSAMOS 2011: 77-84
Coauthor Index
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