![](https://dblp.dagstuhl.de/img/logo.ua.320x120.png)
![](https://dblp.dagstuhl.de/img/dropdown.dark.16x16.png)
![](https://dblp.dagstuhl.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
![search dblp](https://dblp.dagstuhl.de/img/search.dark.16x16.png)
default search action
Bharat L. Bhuva
Person information
Refine list
![note](https://dblp.dagstuhl.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [c28]Jenna B. Kronenberg, Yoni Xiong, Nicholas J. Pieper, Dennis R. Ball, Bharat L. Bhuva:
Single-Event Performance of Flip Flop Designs at the 5-nm Bulk FinFET Node at Near-Threshold Supply Voltages. IRPS 2024: 1-5 - [c27]Nicholas J. Pieper, M. Chun, Yoni Xiong, H. M. Dattilo, Jenna B. Kronenberg, Sanghyeon Baeg, Shi-Jie Wen, Rita Fung, D. Chan, C. Escobar, Bharat L. Bhuva:
Total-Ionizing Dose Damage from X-Ray PCB Inspection Systems. IRPS 2024: 1-7 - [c26]Balaji Narasimham, A-R. Montoya, C. Paone, T. Riehle, Mike Smith, Liming Tsau, Dennis R. Ball, Bharat L. Bhuva:
Scaling Trends and Bias Dependence of SRAM SER from 16-nm to 3-nm FinFET. IRPS 2024: 10 - [c25]Yoni Xiong, Nicholas J. Pieper, Jenna B. Kronenberg, Dennis R. Ball, Megan Casey, Bharat L. Bhuva:
Multiple Bit Upsets in Register Circuits at the 5-nm Bulk FinFET Node. IRPS 2024: 46 - 2023
- [c24]Nicholas J. Pieper, Yoni Xiong, Dennis R. Ball, J. Pasternak, Bharat L. Bhuva:
Effects of Collected Charge and Drain Area on SE Response of SRAMs at the 5-nm FinFET Node. IRPS 2023: 1-6 - [c23]Yoni Xiong, Yueh Chiang, Nicholas J. Pieper, Dennis R. Ball, Bharat L. Bhuva:
Soft Error Rate Predictions for Terrestrial Neutrons at the 3-nm Bulk FinFET Technology. IRPS 2023: 1-6 - 2022
- [c22]Nicholas J. Pieper, Yoni Xiong, Alexandra Feeley, Dennis R. Ball, Bharat L. Bhuva:
Single-Event Latchup Vulnerability at the 7-nm FinFET Node. IRPS 2022: 5 - [c21]Yoni Xiong, Alexandra Feeley, Nicholas J. Pieper, Dennis R. Ball, Balaji Narasimham, John Brockman, N. A. Dodds, S. A. Wender, Shi-Jie Wen, Rita Fung, Bharat L. Bhuva:
Soft Error Characterization of D-FFs at the 5-nm Bulk FinFET Technology for the Terrestrial Environment. IRPS 2022: 7 - 2021
- [c20]Alexandra Feeley, Yoni Xiong, Bharat L. Bhuva, Balaji Narasimham, Shi-Ji Wen, Rita Fung:
Effects of Temperature and Supply Voltage on Soft Errors for 7-nm Bulk FinFET Technology. IRPS 2021: 1-5 - [c19]Balaji Narasimham, Vikas Chaudhary, Mike Smith, Liming Tsau, Dennis R. Ball, Bharat L. Bhuva:
Scaling Trends in the Soft Error Rate of SRAMs from Planar to 5-nm FinFET. IRPS 2021: 1-5 - [c18]Yoni Xiong, Alexandra Feeley, Lloyd W. Massengill, Bharat L. Bhuva, Shi-Jie Wen, Rita Fung:
Frequency, LET, and Supply Voltage Dependence of Logic Soft Errors at the 7-nm Node. IRPS 2021: 1-5 - 2020
- [c17]Jingchen Cao, Lyuan Xu, Shi-Jie Wen, Rita Fung, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva:
Temperature Dependence of Single-Event Transient Pulse Widths for 7-nm Bulk FinFET Technology. IRPS 2020: 1-5 - [c16]Lyuan Xu, Jingchen Cao, John Brockman, Carlo Cazzaniga, Christopher Frost, Shi-Jie Wen, Rita Fung, Bharat L. Bhuva:
Thermal Neutron Induced Soft Errors in 7-nm Bulk FinFET Node. IRPS 2020: 1-5 - [c15]Lyuan Xu, Jingchen Cao, Shi-Jie Wen, Rita Fung, Jamie Markevitch, Dennis R. Ball, Bharat L. Bhuva:
High-Current State triggered by Operating-Frequency Change. IRPS 2020: 1-4
2010 – 2019
- 2019
- [c14]Jingchen Cao, Lyuan Xu, Bharat L. Bhuva, Shi-Jie Wen, Richard Wong, Balaji Narasimham, Lloyd W. Massengill:
Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies. IRPS 2019: 1-5 - [c13]Balaji Narasimham, K. Chandrasekharan, J. K. Wang, Bharat L. Bhuva:
Soft Error Performance of High-Speed Pulsed-DICE-Latch Design in 16 nm and 7 nm FinFET Processes. IRPS 2019: 1-4 - [c12]S. A. Wender, J. M. O'Donnell, Lukas Zavorka
, Bharat L. Bhuva:
Neutron Beam Attenuation Through Semiconductor Devices During SEU Testing. IRPS 2019: 1-4 - [c11]Lyuan Xu, Jingchen Cao, Bharat L. Bhuva, Indranil Chatterjee, Shi-Jie Wen, Richard Wong, Lloyd W. Massengill:
Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology. IRPS 2019: 1-5 - 2018
- [j10]Alexandre Simionovski, Gilson I. Wirth
, Ronald D. Schrimpf, Bharat L. Bhuva:
A TCAD evaluation of a single Bulk-BICS with integrative memory cell. Microelectron. J. 80: 62-68 (2018) - [c10]H. Zhang, H. Jiang, M. R. Eaker, Kurt J. Lezon, Balaji Narasimham, Nihaar N. Mahatme, Lloyd W. Massengill, Bharat L. Bhuva:
Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technology. IRPS 2018: 1 - [c9]Hui Jiang, H. Zhang, R. C. Harrington, J. A. Maharrey, J. S. Kauppila, Lloyd W. Massengill, Bharat L. Bhuva:
Impact of supply voltage and particle LET on the soft error rate of logic circuits. IRPS 2018: 4 - [c8]H. Jiang, H. Zhang, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva:
Designing soft-error-aware circuits with power and speed optimization. IRPS 2018: 5-1 - [c7]Kurt J. Lezon, Shi-Jie Wen, Y.-F. Dan, Richard Wong, Bharat L. Bhuva:
Single-event effects on optical transceiver. IRPS 2018: 6-1 - 2016
- [c6]Rongmei Chen, Enxia Zhang, Bharat L. Bhuva:
Single-event performance of differential flip-flop designs and hardening implication. IOLTS 2016: 221-226 - 2015
- [c5]Balaji Narasimham, Jung K. Wang, Narayana Vedula, Saket Gupta, Brandon Bartz, Carl Monzel, Indranil Chatterjee
, Bharat L. Bhuva, Ronald D. Schrimpf, Robert A. Reed:
Influence of supply voltage on the multi-cell upset soft error sensitivity of dual- and triple-well 28 nm CMOS SRAMs. IRPS 2015: 2 - [c4]Nihaar N. Mahatme, Bharat L. Bhuva, Nelson J. Gaspard, T. Assis, Y. Xu, P. Marcoux, M. Vilchis, Balaji Narasimham, A. Shih, Shi-Jie Wen, Rick Wong, N. Tam, M. Shroff, S. Koyoma, A. Oates:
Terrestrial SER characterization for nanoscale technologies: A comparative study. IRPS 2015: 4 - [c3]N. Tam, Bharat L. Bhuva, Lloyd W. Massengill, Dennis R. Ball, Michael W. McCurdy, Michael L. Alles, Indranil Chatterjee
:
Multi-cell soft errors at the 16-nm FinFET technology node. IRPS 2015: 4 - 2014
- [j9]Yi Ren, Anlin He, Shuting Shi, Gang Guo, Li Chen
, Shi-Jie Wen, Richard Wong, N. W. van Vonno, Bharat L. Bhuva:
Single-Event Transient Measurements on a DC/DC Pulse Width Modulator Using Heavy Ion, Proton, and Pulsed Laser. J. Electron. Test. 30(1): 149-154 (2014) - 2013
- [j8]Zhichao Zhang, Yi Ren, Li Chen
, Nelson J. Gaspard, Arthur F. Witulski, W. Timothy Holman, Bharat L. Bhuva, Shi-Jie Wen, Ramaswami Sammynaiken:
A Bulk Built-In Voltage Sensor to Detect Physical Location of Single-Event Transients. J. Electron. Test. 29(2): 249-253 (2013) - [j7]Nihaar N. Mahatme, Indranil Chatterjee
, Akash Patki, Daniel B. Limbrick
, Bharat L. Bhuva, Ronald D. Schrimpf
, William H. Robinson
:
An efficient technique to select logic nodes for single event transient pulse-width reduction. Microelectron. Reliab. 53(1): 114-117 (2013) - 2012
- [j6]Yi Ren, L. Fan, Li Chen, Shi-Jie Wen, Richard Wong, N. W. van Vonno, Arthur F. Witulski, Bharat L. Bhuva:
Single-Event Effects Analysis of a Pulse Width Modulator IC in a DC/DC Converter. J. Electron. Test. 28(6): 877-883 (2012) - [j5]David Rennie, David Li, Manoj Sachdev, Bharat L. Bhuva, Srikanth Jagannathan, Shi-Jie Wen, Richard Wong:
Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1626-1634 (2012) - 2011
- [c2]David Rennie, David Li, Manoj Sachdev, Bharat L. Bhuva, Srikanth Jagannathan, Shi-Jie Wen, Rick Wong:
Performance, metastability and soft-error robustness tradeoffs for flip-flops in 40nm CMOS. CICC 2011: 1-4 - [c1]Daniel B. Limbrick
, Suge Yue, William H. Robinson
, Bharat L. Bhuva:
Impact of Synthesis Constraints on Error Propagation Probability of Digital Circuits. DFT 2011: 103-111
2000 – 2009
- 2008
- [j4]Patrick R. Fleming, Brian D. Olson, W. Timothy Holman, Bharat L. Bhuva, Lloyd W. Massengill:
Design Technique for Mitigation of Soft Errors in Differential Switched-Capacitor Circuits. IEEE Trans. Circuits Syst. II Express Briefs 55-II(9): 838-842 (2008)
1990 – 1999
- 1993
- [j3]Venkata S. Rangavajjhala, Bharat L. Bhuva, Sherra E. Kerns:
Statistical degradation analysis of digital CMOS IC's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(6): 837-844 (1993) - 1992
- [j2]Neeraj Kaul, Gautam Biswas, Bharat L. Bhuva:
Multi-level qualitative reasoning applied to CMOS digital circuits. Artif. Intell. Eng. 7(3): 125-137 (1992)
1980 – 1989
- 1989
- [j1]Bharat L. Bhuva, John J. Paulos, Ronald S. Gyurcsik, Sherra E. Kerns:
Switch-level simulation of total dose effects on CMOS VLSI circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(9): 933-938 (1989)
Coauthor Index
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-05 20:17 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint